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Searched refs:SYSCON_SAI0CLKDIV_DIV_MASK (Results 1 – 16 of 16) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/drivers/
Dfsl_clock.c1516 div = ((id == 0U) ? ((SYSCON->SAI0CLKDIV & SYSCON_SAI0CLKDIV_DIV_MASK) + 1U) : in CLOCK_GetSaiClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/drivers/
Dfsl_clock.c1516 div = ((id == 0U) ? ((SYSCON->SAI0CLKDIV & SYSCON_SAI0CLKDIV_DIV_MASK) + 1U) : in CLOCK_GetSaiClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/drivers/
Dfsl_clock.c1893 div = ((id == 0U) ? ((SYSCON->SAI0CLKDIV & SYSCON_SAI0CLKDIV_DIV_MASK) + 1U) : in CLOCK_GetSaiClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/drivers/
Dfsl_clock.c1893 div = ((id == 0U) ? ((SYSCON->SAI0CLKDIV & SYSCON_SAI0CLKDIV_DIV_MASK) + 1U) : in CLOCK_GetSaiClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/drivers/
Dfsl_clock.c1893 div = ((id == 0U) ? ((SYSCON->SAI0CLKDIV & SYSCON_SAI0CLKDIV_DIV_MASK) + 1U) : in CLOCK_GetSaiClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/drivers/
Dfsl_clock.c1893 div = ((id == 0U) ? ((SYSCON->SAI0CLKDIV & SYSCON_SAI0CLKDIV_DIV_MASK) + 1U) : in CLOCK_GetSaiClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h58316 #define SYSCON_SAI0CLKDIV_DIV_MASK (0x7U) macro
58319 … (((uint32_t)(((uint32_t)(x)) << SYSCON_SAI0CLKDIV_DIV_SHIFT)) & SYSCON_SAI0CLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h58274 #define SYSCON_SAI0CLKDIV_DIV_MASK (0x7U) macro
58277 … (((uint32_t)(((uint32_t)(x)) << SYSCON_SAI0CLKDIV_DIV_SHIFT)) & SYSCON_SAI0CLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h74023 #define SYSCON_SAI0CLKDIV_DIV_MASK (0x7U) macro
74026 … (((uint32_t)(((uint32_t)(x)) << SYSCON_SAI0CLKDIV_DIV_SHIFT)) & SYSCON_SAI0CLKDIV_DIV_MASK)
DMCXN546_cm33_core1.h74023 #define SYSCON_SAI0CLKDIV_DIV_MASK (0x7U) macro
74026 … (((uint32_t)(((uint32_t)(x)) << SYSCON_SAI0CLKDIV_DIV_SHIFT)) & SYSCON_SAI0CLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h74023 #define SYSCON_SAI0CLKDIV_DIV_MASK (0x7U) macro
74026 … (((uint32_t)(((uint32_t)(x)) << SYSCON_SAI0CLKDIV_DIV_SHIFT)) & SYSCON_SAI0CLKDIV_DIV_MASK)
DMCXN547_cm33_core1.h74023 #define SYSCON_SAI0CLKDIV_DIV_MASK (0x7U) macro
74026 … (((uint32_t)(((uint32_t)(x)) << SYSCON_SAI0CLKDIV_DIV_SHIFT)) & SYSCON_SAI0CLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h76689 #define SYSCON_SAI0CLKDIV_DIV_MASK (0x7U) macro
76692 … (((uint32_t)(((uint32_t)(x)) << SYSCON_SAI0CLKDIV_DIV_SHIFT)) & SYSCON_SAI0CLKDIV_DIV_MASK)
DMCXN947_cm33_core0.h76689 #define SYSCON_SAI0CLKDIV_DIV_MASK (0x7U) macro
76692 … (((uint32_t)(((uint32_t)(x)) << SYSCON_SAI0CLKDIV_DIV_SHIFT)) & SYSCON_SAI0CLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h76689 #define SYSCON_SAI0CLKDIV_DIV_MASK (0x7U) macro
76692 … (((uint32_t)(((uint32_t)(x)) << SYSCON_SAI0CLKDIV_DIV_SHIFT)) & SYSCON_SAI0CLKDIV_DIV_MASK)
DMCXN946_cm33_core1.h76689 #define SYSCON_SAI0CLKDIV_DIV_MASK (0x7U) macro
76692 … (((uint32_t)(((uint32_t)(x)) << SYSCON_SAI0CLKDIV_DIV_SHIFT)) & SYSCON_SAI0CLKDIV_DIV_MASK)