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Searched refs:SYSCON_PRESETCTRL3_QDC0_RST_MASK (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h55967 #define SYSCON_PRESETCTRL3_QDC0_RST_MASK (0x10U) macro
55973 …int32_t)(((uint32_t)(x)) << SYSCON_PRESETCTRL3_QDC0_RST_SHIFT)) & SYSCON_PRESETCTRL3_QDC0_RST_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h55925 #define SYSCON_PRESETCTRL3_QDC0_RST_MASK (0x10U) macro
55931 …int32_t)(((uint32_t)(x)) << SYSCON_PRESETCTRL3_QDC0_RST_SHIFT)) & SYSCON_PRESETCTRL3_QDC0_RST_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h70592 #define SYSCON_PRESETCTRL3_QDC0_RST_MASK (0x10U) macro
70598 …int32_t)(((uint32_t)(x)) << SYSCON_PRESETCTRL3_QDC0_RST_SHIFT)) & SYSCON_PRESETCTRL3_QDC0_RST_MASK)
DMCXN546_cm33_core1.h70592 #define SYSCON_PRESETCTRL3_QDC0_RST_MASK (0x10U) macro
70598 …int32_t)(((uint32_t)(x)) << SYSCON_PRESETCTRL3_QDC0_RST_SHIFT)) & SYSCON_PRESETCTRL3_QDC0_RST_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h70592 #define SYSCON_PRESETCTRL3_QDC0_RST_MASK (0x10U) macro
70598 …int32_t)(((uint32_t)(x)) << SYSCON_PRESETCTRL3_QDC0_RST_SHIFT)) & SYSCON_PRESETCTRL3_QDC0_RST_MASK)
DMCXN547_cm33_core1.h70592 #define SYSCON_PRESETCTRL3_QDC0_RST_MASK (0x10U) macro
70598 …int32_t)(((uint32_t)(x)) << SYSCON_PRESETCTRL3_QDC0_RST_SHIFT)) & SYSCON_PRESETCTRL3_QDC0_RST_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h73258 #define SYSCON_PRESETCTRL3_QDC0_RST_MASK (0x10U) macro
73264 …int32_t)(((uint32_t)(x)) << SYSCON_PRESETCTRL3_QDC0_RST_SHIFT)) & SYSCON_PRESETCTRL3_QDC0_RST_MASK)
DMCXN947_cm33_core0.h73258 #define SYSCON_PRESETCTRL3_QDC0_RST_MASK (0x10U) macro
73264 …int32_t)(((uint32_t)(x)) << SYSCON_PRESETCTRL3_QDC0_RST_SHIFT)) & SYSCON_PRESETCTRL3_QDC0_RST_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h73258 #define SYSCON_PRESETCTRL3_QDC0_RST_MASK (0x10U) macro
73264 …int32_t)(((uint32_t)(x)) << SYSCON_PRESETCTRL3_QDC0_RST_SHIFT)) & SYSCON_PRESETCTRL3_QDC0_RST_MASK)
DMCXN946_cm33_core1.h73258 #define SYSCON_PRESETCTRL3_QDC0_RST_MASK (0x10U) macro
73264 …int32_t)(((uint32_t)(x)) << SYSCON_PRESETCTRL3_QDC0_RST_SHIFT)) & SYSCON_PRESETCTRL3_QDC0_RST_MASK)