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Searched refs:SYSCON_MCLKDIV_DIV_MASK (Results 1 – 25 of 43) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/LPC51U68/
DLPC51U68.h8515 #define SYSCON_MCLKDIV_DIV_MASK (0xFFU) macro
8519 … (((uint32_t)(((uint32_t)(x)) << SYSCON_MCLKDIV_DIV_SHIFT)) & SYSCON_MCLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54114/
DLPC54114_cm0plus.h9313 #define SYSCON_MCLKDIV_DIV_MASK (0xFFU) macro
9317 … (((uint32_t)(((uint32_t)(x)) << SYSCON_MCLKDIV_DIV_SHIFT)) & SYSCON_MCLKDIV_DIV_MASK)
DLPC54114_cm4.h9326 #define SYSCON_MCLKDIV_DIV_MASK (0xFFU) macro
9330 … (((uint32_t)(((uint32_t)(x)) << SYSCON_MCLKDIV_DIV_SHIFT)) & SYSCON_MCLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54113/
DLPC54113.h9327 #define SYSCON_MCLKDIV_DIV_MASK (0xFFU) macro
9331 … (((uint32_t)(((uint32_t)(x)) << SYSCON_MCLKDIV_DIV_SHIFT)) & SYSCON_MCLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54607/
DLPC54607.h14304 #define SYSCON_MCLKDIV_DIV_MASK (0xFFU) macro
14308 … (((uint32_t)(((uint32_t)(x)) << SYSCON_MCLKDIV_DIV_SHIFT)) & SYSCON_MCLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S005/
DLPC54S005.h14310 #define SYSCON_MCLKDIV_DIV_MASK (0xFFU) macro
14314 … (((uint32_t)(((uint32_t)(x)) << SYSCON_MCLKDIV_DIV_SHIFT)) & SYSCON_MCLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54005/
DLPC54005.h13518 #define SYSCON_MCLKDIV_DIV_MASK (0xFFU) macro
13522 … (((uint32_t)(((uint32_t)(x)) << SYSCON_MCLKDIV_DIV_SHIFT)) & SYSCON_MCLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54605/
DLPC54605.h13660 #define SYSCON_MCLKDIV_DIV_MASK (0xFFU) macro
13664 … (((uint32_t)(((uint32_t)(x)) << SYSCON_MCLKDIV_DIV_SHIFT)) & SYSCON_MCLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54606/
DLPC54606.h17808 #define SYSCON_MCLKDIV_DIV_MASK (0xFFU) macro
17812 … (((uint32_t)(((uint32_t)(x)) << SYSCON_MCLKDIV_DIV_SHIFT)) & SYSCON_MCLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54016/
DLPC54016.h16687 #define SYSCON_MCLKDIV_DIV_MASK (0xFFU) macro
16690 … (((uint32_t)(((uint32_t)(x)) << SYSCON_MCLKDIV_DIV_SHIFT)) & SYSCON_MCLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54616/
DLPC54616.h17883 #define SYSCON_MCLKDIV_DIV_MASK (0xFFU) macro
17887 … (((uint32_t)(((uint32_t)(x)) << SYSCON_MCLKDIV_DIV_SHIFT)) & SYSCON_MCLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54018M/
DLPC54018M.h18411 #define SYSCON_MCLKDIV_DIV_MASK (0xFFU) macro
18415 … (((uint32_t)(((uint32_t)(x)) << SYSCON_MCLKDIV_DIV_SHIFT)) & SYSCON_MCLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54628/
DLPC54628.h18729 #define SYSCON_MCLKDIV_DIV_MASK (0xFFU) macro
18733 … (((uint32_t)(((uint32_t)(x)) << SYSCON_MCLKDIV_DIV_SHIFT)) & SYSCON_MCLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502/
DLPC5502.h22653 #define SYSCON_MCLKDIV_DIV_MASK (0xFFU) macro
22657 … (((uint32_t)(((uint32_t)(x)) << SYSCON_MCLKDIV_DIV_SHIFT)) & SYSCON_MCLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502CPXXXX/
DLPC5502CPXXXX.h22500 #define SYSCON_MCLKDIV_DIV_MASK (0xFFU) macro
22504 … (((uint32_t)(((uint32_t)(x)) << SYSCON_MCLKDIV_DIV_SHIFT)) & SYSCON_MCLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54618/
DLPC54618.h18528 #define SYSCON_MCLKDIV_DIV_MASK (0xFFU) macro
18532 … (((uint32_t)(((uint32_t)(x)) << SYSCON_MCLKDIV_DIV_SHIFT)) & SYSCON_MCLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S018/
DLPC54S018.h19203 #define SYSCON_MCLKDIV_DIV_MASK (0xFFU) macro
19207 … (((uint32_t)(((uint32_t)(x)) << SYSCON_MCLKDIV_DIV_SHIFT)) & SYSCON_MCLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54018/
DLPC54018.h18411 #define SYSCON_MCLKDIV_DIV_MASK (0xFFU) macro
18415 … (((uint32_t)(((uint32_t)(x)) << SYSCON_MCLKDIV_DIV_SHIFT)) & SYSCON_MCLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S016/
DLPC54S016.h17393 #define SYSCON_MCLKDIV_DIV_MASK (0xFFU) macro
17396 … (((uint32_t)(((uint32_t)(x)) << SYSCON_MCLKDIV_DIV_SHIFT)) & SYSCON_MCLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5504CPXXXX/
DLPC5504CPXXXX.h22500 #define SYSCON_MCLKDIV_DIV_MASK (0xFFU) macro
22504 … (((uint32_t)(((uint32_t)(x)) << SYSCON_MCLKDIV_DIV_SHIFT)) & SYSCON_MCLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5504/
DLPC5504.h22653 #define SYSCON_MCLKDIV_DIV_MASK (0xFFU) macro
22657 … (((uint32_t)(((uint32_t)(x)) << SYSCON_MCLKDIV_DIV_SHIFT)) & SYSCON_MCLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5506/
DLPC5506.h22653 #define SYSCON_MCLKDIV_DIV_MASK (0xFFU) macro
22657 … (((uint32_t)(((uint32_t)(x)) << SYSCON_MCLKDIV_DIV_SHIFT)) & SYSCON_MCLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5506CPXXXX/
DLPC5506CPXXXX.h22500 #define SYSCON_MCLKDIV_DIV_MASK (0xFFU) macro
22504 … (((uint32_t)(((uint32_t)(x)) << SYSCON_MCLKDIV_DIV_SHIFT)) & SYSCON_MCLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54608/
DLPC54608.h18451 #define SYSCON_MCLKDIV_DIV_MASK (0xFFU) macro
18455 … (((uint32_t)(((uint32_t)(x)) << SYSCON_MCLKDIV_DIV_SHIFT)) & SYSCON_MCLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S018M/
DLPC54S018M.h19203 #define SYSCON_MCLKDIV_DIV_MASK (0xFFU) macro
19207 … (((uint32_t)(((uint32_t)(x)) << SYSCON_MCLKDIV_DIV_SHIFT)) & SYSCON_MCLKDIV_DIV_MASK)

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