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Searched refs:SYSCON_I3C0FCLKDIV_RESET_MASK (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h57625 #define SYSCON_I3C0FCLKDIV_RESET_MASK (0x20000000U) macro
57631 … (((uint32_t)(((uint32_t)(x)) << SYSCON_I3C0FCLKDIV_RESET_SHIFT)) & SYSCON_I3C0FCLKDIV_RESET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h57583 #define SYSCON_I3C0FCLKDIV_RESET_MASK (0x20000000U) macro
57589 … (((uint32_t)(((uint32_t)(x)) << SYSCON_I3C0FCLKDIV_RESET_SHIFT)) & SYSCON_I3C0FCLKDIV_RESET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h72975 #define SYSCON_I3C0FCLKDIV_RESET_MASK (0x20000000U) macro
72981 … (((uint32_t)(((uint32_t)(x)) << SYSCON_I3C0FCLKDIV_RESET_SHIFT)) & SYSCON_I3C0FCLKDIV_RESET_MASK)
DMCXN546_cm33_core1.h72975 #define SYSCON_I3C0FCLKDIV_RESET_MASK (0x20000000U) macro
72981 … (((uint32_t)(((uint32_t)(x)) << SYSCON_I3C0FCLKDIV_RESET_SHIFT)) & SYSCON_I3C0FCLKDIV_RESET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h72975 #define SYSCON_I3C0FCLKDIV_RESET_MASK (0x20000000U) macro
72981 … (((uint32_t)(((uint32_t)(x)) << SYSCON_I3C0FCLKDIV_RESET_SHIFT)) & SYSCON_I3C0FCLKDIV_RESET_MASK)
DMCXN547_cm33_core1.h72975 #define SYSCON_I3C0FCLKDIV_RESET_MASK (0x20000000U) macro
72981 … (((uint32_t)(((uint32_t)(x)) << SYSCON_I3C0FCLKDIV_RESET_SHIFT)) & SYSCON_I3C0FCLKDIV_RESET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h75641 #define SYSCON_I3C0FCLKDIV_RESET_MASK (0x20000000U) macro
75647 … (((uint32_t)(((uint32_t)(x)) << SYSCON_I3C0FCLKDIV_RESET_SHIFT)) & SYSCON_I3C0FCLKDIV_RESET_MASK)
DMCXN947_cm33_core0.h75641 #define SYSCON_I3C0FCLKDIV_RESET_MASK (0x20000000U) macro
75647 … (((uint32_t)(((uint32_t)(x)) << SYSCON_I3C0FCLKDIV_RESET_SHIFT)) & SYSCON_I3C0FCLKDIV_RESET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h75641 #define SYSCON_I3C0FCLKDIV_RESET_MASK (0x20000000U) macro
75647 … (((uint32_t)(((uint32_t)(x)) << SYSCON_I3C0FCLKDIV_RESET_SHIFT)) & SYSCON_I3C0FCLKDIV_RESET_MASK)
DMCXN946_cm33_core1.h75641 #define SYSCON_I3C0FCLKDIV_RESET_MASK (0x20000000U) macro
75647 … (((uint32_t)(((uint32_t)(x)) << SYSCON_I3C0FCLKDIV_RESET_SHIFT)) & SYSCON_I3C0FCLKDIV_RESET_MASK)