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Searched refs:SYSCON_ETB_STATUS_NMI_MASK (Results 1 – 8 of 8) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h75448 #define SYSCON_ETB_STATUS_NMI_MASK (0x4U) macro
75454 … (((uint32_t)(((uint32_t)(x)) << SYSCON_ETB_STATUS_NMI_SHIFT)) & SYSCON_ETB_STATUS_NMI_MASK)
DMCXN546_cm33_core1.h75448 #define SYSCON_ETB_STATUS_NMI_MASK (0x4U) macro
75454 … (((uint32_t)(((uint32_t)(x)) << SYSCON_ETB_STATUS_NMI_SHIFT)) & SYSCON_ETB_STATUS_NMI_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h75448 #define SYSCON_ETB_STATUS_NMI_MASK (0x4U) macro
75454 … (((uint32_t)(((uint32_t)(x)) << SYSCON_ETB_STATUS_NMI_SHIFT)) & SYSCON_ETB_STATUS_NMI_MASK)
DMCXN547_cm33_core1.h75448 #define SYSCON_ETB_STATUS_NMI_MASK (0x4U) macro
75454 … (((uint32_t)(((uint32_t)(x)) << SYSCON_ETB_STATUS_NMI_SHIFT)) & SYSCON_ETB_STATUS_NMI_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h78114 #define SYSCON_ETB_STATUS_NMI_MASK (0x4U) macro
78120 … (((uint32_t)(((uint32_t)(x)) << SYSCON_ETB_STATUS_NMI_SHIFT)) & SYSCON_ETB_STATUS_NMI_MASK)
DMCXN947_cm33_core0.h78114 #define SYSCON_ETB_STATUS_NMI_MASK (0x4U) macro
78120 … (((uint32_t)(((uint32_t)(x)) << SYSCON_ETB_STATUS_NMI_SHIFT)) & SYSCON_ETB_STATUS_NMI_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h78114 #define SYSCON_ETB_STATUS_NMI_MASK (0x4U) macro
78120 … (((uint32_t)(((uint32_t)(x)) << SYSCON_ETB_STATUS_NMI_SHIFT)) & SYSCON_ETB_STATUS_NMI_MASK)
DMCXN946_cm33_core1.h78114 #define SYSCON_ETB_STATUS_NMI_MASK (0x4U) macro
78120 … (((uint32_t)(((uint32_t)(x)) << SYSCON_ETB_STATUS_NMI_SHIFT)) & SYSCON_ETB_STATUS_NMI_MASK)