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Searched refs:SYSCON_AHBCLKCTRL0_RAMD_CTRL_MASK (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h56083 #define SYSCON_AHBCLKCTRL0_RAMD_CTRL_MASK (0x10U) macro
56089 …t32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL0_RAMD_CTRL_SHIFT)) & SYSCON_AHBCLKCTRL0_RAMD_CTRL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h56041 #define SYSCON_AHBCLKCTRL0_RAMD_CTRL_MASK (0x10U) macro
56047 …t32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL0_RAMD_CTRL_SHIFT)) & SYSCON_AHBCLKCTRL0_RAMD_CTRL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h70788 #define SYSCON_AHBCLKCTRL0_RAMD_CTRL_MASK (0x10U) macro
70794 …t32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL0_RAMD_CTRL_SHIFT)) & SYSCON_AHBCLKCTRL0_RAMD_CTRL_MASK)
DMCXN546_cm33_core1.h70788 #define SYSCON_AHBCLKCTRL0_RAMD_CTRL_MASK (0x10U) macro
70794 …t32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL0_RAMD_CTRL_SHIFT)) & SYSCON_AHBCLKCTRL0_RAMD_CTRL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h70788 #define SYSCON_AHBCLKCTRL0_RAMD_CTRL_MASK (0x10U) macro
70794 …t32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL0_RAMD_CTRL_SHIFT)) & SYSCON_AHBCLKCTRL0_RAMD_CTRL_MASK)
DMCXN547_cm33_core1.h70788 #define SYSCON_AHBCLKCTRL0_RAMD_CTRL_MASK (0x10U) macro
70794 …t32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL0_RAMD_CTRL_SHIFT)) & SYSCON_AHBCLKCTRL0_RAMD_CTRL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h73454 #define SYSCON_AHBCLKCTRL0_RAMD_CTRL_MASK (0x10U) macro
73460 …t32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL0_RAMD_CTRL_SHIFT)) & SYSCON_AHBCLKCTRL0_RAMD_CTRL_MASK)
DMCXN947_cm33_core0.h73454 #define SYSCON_AHBCLKCTRL0_RAMD_CTRL_MASK (0x10U) macro
73460 …t32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL0_RAMD_CTRL_SHIFT)) & SYSCON_AHBCLKCTRL0_RAMD_CTRL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h73454 #define SYSCON_AHBCLKCTRL0_RAMD_CTRL_MASK (0x10U) macro
73460 …t32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL0_RAMD_CTRL_SHIFT)) & SYSCON_AHBCLKCTRL0_RAMD_CTRL_MASK)
DMCXN946_cm33_core1.h73454 #define SYSCON_AHBCLKCTRL0_RAMD_CTRL_MASK (0x10U) macro
73460 …t32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL0_RAMD_CTRL_SHIFT)) & SYSCON_AHBCLKCTRL0_RAMD_CTRL_MASK)