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Searched refs:SYSCON_AHBCLKCTRL0_FLEXSPI_MASK (Results 1 – 11 of 11) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h41673 #define SYSCON_AHBCLKCTRL0_FLEXSPI_MASK (0x400U) macro
41679 …(uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL0_FLEXSPI_SHIFT)) & SYSCON_AHBCLKCTRL0_FLEXSPI_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h41673 #define SYSCON_AHBCLKCTRL0_FLEXSPI_MASK (0x400U) macro
41679 …(uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL0_FLEXSPI_SHIFT)) & SYSCON_AHBCLKCTRL0_FLEXSPI_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S36/
DLPC55S36.h51378 #define SYSCON_AHBCLKCTRL0_FLEXSPI_MASK (0x400U) macro
51384 …(uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL0_FLEXSPI_SHIFT)) & SYSCON_AHBCLKCTRL0_FLEXSPI_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h70844 #define SYSCON_AHBCLKCTRL0_FLEXSPI_MASK (0x800U) macro
70850 …(uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL0_FLEXSPI_SHIFT)) & SYSCON_AHBCLKCTRL0_FLEXSPI_MASK)
DMCXN546_cm33_core1.h70844 #define SYSCON_AHBCLKCTRL0_FLEXSPI_MASK (0x800U) macro
70850 …(uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL0_FLEXSPI_SHIFT)) & SYSCON_AHBCLKCTRL0_FLEXSPI_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h70844 #define SYSCON_AHBCLKCTRL0_FLEXSPI_MASK (0x800U) macro
70850 …(uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL0_FLEXSPI_SHIFT)) & SYSCON_AHBCLKCTRL0_FLEXSPI_MASK)
DMCXN547_cm33_core1.h70844 #define SYSCON_AHBCLKCTRL0_FLEXSPI_MASK (0x800U) macro
70850 …(uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL0_FLEXSPI_SHIFT)) & SYSCON_AHBCLKCTRL0_FLEXSPI_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h73510 #define SYSCON_AHBCLKCTRL0_FLEXSPI_MASK (0x800U) macro
73516 …(uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL0_FLEXSPI_SHIFT)) & SYSCON_AHBCLKCTRL0_FLEXSPI_MASK)
DMCXN947_cm33_core0.h73510 #define SYSCON_AHBCLKCTRL0_FLEXSPI_MASK (0x800U) macro
73516 …(uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL0_FLEXSPI_SHIFT)) & SYSCON_AHBCLKCTRL0_FLEXSPI_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h73510 #define SYSCON_AHBCLKCTRL0_FLEXSPI_MASK (0x800U) macro
73516 …(uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL0_FLEXSPI_SHIFT)) & SYSCON_AHBCLKCTRL0_FLEXSPI_MASK)
DMCXN946_cm33_core1.h73510 #define SYSCON_AHBCLKCTRL0_FLEXSPI_MASK (0x800U) macro
73516 …(uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL0_FLEXSPI_SHIFT)) & SYSCON_AHBCLKCTRL0_FLEXSPI_MASK)