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Searched refs:SYSCON_ADC1CLKDIV_RESET_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h43238 #define SYSCON_ADC1CLKDIV_RESET_MASK (0x20000000U) macro
43244 … (((uint32_t)(((uint32_t)(x)) << SYSCON_ADC1CLKDIV_RESET_SHIFT)) & SYSCON_ADC1CLKDIV_RESET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h43238 #define SYSCON_ADC1CLKDIV_RESET_MASK (0x20000000U) macro
43244 … (((uint32_t)(((uint32_t)(x)) << SYSCON_ADC1CLKDIV_RESET_SHIFT)) & SYSCON_ADC1CLKDIV_RESET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S36/
DLPC55S36.h52943 #define SYSCON_ADC1CLKDIV_RESET_MASK (0x20000000U) macro
52949 … (((uint32_t)(((uint32_t)(x)) << SYSCON_ADC1CLKDIV_RESET_SHIFT)) & SYSCON_ADC1CLKDIV_RESET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h57544 #define SYSCON_ADC1CLKDIV_RESET_MASK (0x20000000U) macro
57550 … (((uint32_t)(((uint32_t)(x)) << SYSCON_ADC1CLKDIV_RESET_SHIFT)) & SYSCON_ADC1CLKDIV_RESET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h57502 #define SYSCON_ADC1CLKDIV_RESET_MASK (0x20000000U) macro
57508 … (((uint32_t)(((uint32_t)(x)) << SYSCON_ADC1CLKDIV_RESET_SHIFT)) & SYSCON_ADC1CLKDIV_RESET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h72694 #define SYSCON_ADC1CLKDIV_RESET_MASK (0x20000000U) macro
72700 … (((uint32_t)(((uint32_t)(x)) << SYSCON_ADC1CLKDIV_RESET_SHIFT)) & SYSCON_ADC1CLKDIV_RESET_MASK)
DMCXN546_cm33_core1.h72694 #define SYSCON_ADC1CLKDIV_RESET_MASK (0x20000000U) macro
72700 … (((uint32_t)(((uint32_t)(x)) << SYSCON_ADC1CLKDIV_RESET_SHIFT)) & SYSCON_ADC1CLKDIV_RESET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h72694 #define SYSCON_ADC1CLKDIV_RESET_MASK (0x20000000U) macro
72700 … (((uint32_t)(((uint32_t)(x)) << SYSCON_ADC1CLKDIV_RESET_SHIFT)) & SYSCON_ADC1CLKDIV_RESET_MASK)
DMCXN547_cm33_core1.h72694 #define SYSCON_ADC1CLKDIV_RESET_MASK (0x20000000U) macro
72700 … (((uint32_t)(((uint32_t)(x)) << SYSCON_ADC1CLKDIV_RESET_SHIFT)) & SYSCON_ADC1CLKDIV_RESET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h75360 #define SYSCON_ADC1CLKDIV_RESET_MASK (0x20000000U) macro
75366 … (((uint32_t)(((uint32_t)(x)) << SYSCON_ADC1CLKDIV_RESET_SHIFT)) & SYSCON_ADC1CLKDIV_RESET_MASK)
DMCXN947_cm33_core0.h75360 #define SYSCON_ADC1CLKDIV_RESET_MASK (0x20000000U) macro
75366 … (((uint32_t)(((uint32_t)(x)) << SYSCON_ADC1CLKDIV_RESET_SHIFT)) & SYSCON_ADC1CLKDIV_RESET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h75360 #define SYSCON_ADC1CLKDIV_RESET_MASK (0x20000000U) macro
75366 … (((uint32_t)(((uint32_t)(x)) << SYSCON_ADC1CLKDIV_RESET_SHIFT)) & SYSCON_ADC1CLKDIV_RESET_MASK)
DMCXN946_cm33_core1.h75360 #define SYSCON_ADC1CLKDIV_RESET_MASK (0x20000000U) macro
75366 … (((uint32_t)(((uint32_t)(x)) << SYSCON_ADC1CLKDIV_RESET_SHIFT)) & SYSCON_ADC1CLKDIV_RESET_MASK)