Searched refs:SWM_PINASSIGN0_U0_RXD_I_MASK (Results 1 – 13 of 13) sorted by relevance
4206 #define SWM_PINASSIGN0_U0_RXD_I_MASK (0xFF00U) macro4211 … (((uint32_t)(((uint32_t)(x)) << SWM_PINASSIGN0_U0_RXD_I_SHIFT)) & SWM_PINASSIGN0_U0_RXD_I_MASK)
4214 #define SWM_PINASSIGN0_U0_RXD_I_MASK (0xFF00U) macro4219 … (((uint32_t)(((uint32_t)(x)) << SWM_PINASSIGN0_U0_RXD_I_SHIFT)) & SWM_PINASSIGN0_U0_RXD_I_MASK)
4077 #define SWM_PINASSIGN0_U0_RXD_I_MASK (0xFF00U) macro4083 … (((uint32_t)(((uint32_t)(x)) << SWM_PINASSIGN0_U0_RXD_I_SHIFT)) & SWM_PINASSIGN0_U0_RXD_I_MASK)
4752 #define SWM_PINASSIGN0_U0_RXD_I_MASK (0xFF00U) macro4758 … (((uint32_t)(((uint32_t)(x)) << SWM_PINASSIGN0_U0_RXD_I_SHIFT)) & SWM_PINASSIGN0_U0_RXD_I_MASK)
5973 #define SWM_PINASSIGN0_U0_RXD_I_MASK (0xFF00U) macro5978 … (((uint32_t)(((uint32_t)(x)) << SWM_PINASSIGN0_U0_RXD_I_SHIFT)) & SWM_PINASSIGN0_U0_RXD_I_MASK)
5817 #define SWM_PINASSIGN0_U0_RXD_I_MASK (0xFF00U) macro5822 … (((uint32_t)(((uint32_t)(x)) << SWM_PINASSIGN0_U0_RXD_I_SHIFT)) & SWM_PINASSIGN0_U0_RXD_I_MASK)
6466 #define SWM_PINASSIGN0_U0_RXD_I_MASK (0xFF00U) macro6472 … (((uint32_t)(((uint32_t)(x)) << SWM_PINASSIGN0_U0_RXD_I_SHIFT)) & SWM_PINASSIGN0_U0_RXD_I_MASK)
6990 #define SWM_PINASSIGN0_U0_RXD_I_MASK (0xFF00U) macro6996 … (((uint32_t)(((uint32_t)(x)) << SWM_PINASSIGN0_U0_RXD_I_SHIFT)) & SWM_PINASSIGN0_U0_RXD_I_MASK)
8431 #define SWM_PINASSIGN0_U0_RXD_I_MASK (0xFF00U) macro8437 … (((uint32_t)(((uint32_t)(x)) << SWM_PINASSIGN0_U0_RXD_I_SHIFT)) & SWM_PINASSIGN0_U0_RXD_I_MASK)
8429 #define SWM_PINASSIGN0_U0_RXD_I_MASK (0xFF00U) macro8435 … (((uint32_t)(((uint32_t)(x)) << SWM_PINASSIGN0_U0_RXD_I_SHIFT)) & SWM_PINASSIGN0_U0_RXD_I_MASK)
