| /hal_nxp-latest/mcux/mcux-sdk/drivers/flexspi/ |
| D | fsl_flexspi.h | 631 …*portAPhase = (uint8_t)((base->STS0 & FLEXSPI_STS0_DATALEARNPHASEA_MASK) >> FLEXSPI_STS0_DATALEARN… in FLEXSPI_GetDataLearningPhase()
637 …*portBPhase = (uint8_t)((base->STS0 & FLEXSPI_STS0_DATALEARNPHASEB_MASK) >> FLEXSPI_STS0_DATALEARN… in FLEXSPI_GetDataLearningPhase()
651 (uint32_t)((base->STS0 & FLEXSPI_STS0_ARBCMDSRC_MASK) >> FLEXSPI_STS0_ARBCMDSRC_SHIFT)); in FLEXSPI_GetArbitratorCommandSource()
688 …return (0U != (base->STS0 & FLEXSPI_STS0_ARBIDLE_MASK)) && (0U != (base->STS0 & FLEXSPI_STS0_SEQID… in FLEXSPI_GetBusIdleStatus()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/otfad/ |
| D | fsl_otfad.c | 98 status = ((FLEXSPI_Type *)config->flexspiBaseAddr)->STS0; in AT_QUICKACCESS_SECTION_CODE()
101 status = ((FLEXSPI_Type *)config->flexspiBaseAddr)->STS0; in AT_QUICKACCESS_SECTION_CODE()
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| /hal_nxp-latest/mcux/mcux-sdk/boards/frdmrw612/ |
| D | board.c | 217 while (!((base->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) && (base->STS0 & FLEXSPI_STS0_SEQIDLE_MASK))) in BOARD_DeinitFlash()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/drivers/ |
| D | fsl_power.c | 623 while (!(((FLEXSPI0->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) != 0U) && in AT_QUICKACCESS_SECTION_CODE()
624 ((FLEXSPI0->STS0 & FLEXSPI_STS0_SEQIDLE_MASK) != 0U))) in AT_QUICKACCESS_SECTION_CODE()
635 while (!(((FLEXSPI1->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) != 0U) && in AT_QUICKACCESS_SECTION_CODE()
636 ((FLEXSPI1->STS0 & FLEXSPI_STS0_SEQIDLE_MASK) != 0U))) in AT_QUICKACCESS_SECTION_CODE()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/drivers/ |
| D | fsl_power.c | 623 while (!(((FLEXSPI0->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) != 0U) && in AT_QUICKACCESS_SECTION_CODE()
624 ((FLEXSPI0->STS0 & FLEXSPI_STS0_SEQIDLE_MASK) != 0U))) in AT_QUICKACCESS_SECTION_CODE()
635 while (!(((FLEXSPI1->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) != 0U) && in AT_QUICKACCESS_SECTION_CODE()
636 ((FLEXSPI1->STS0 & FLEXSPI_STS0_SEQIDLE_MASK) != 0U))) in AT_QUICKACCESS_SECTION_CODE()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/drivers/ |
| D | fsl_power.c | 623 while (!(((FLEXSPI0->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) != 0U) && in AT_QUICKACCESS_SECTION_CODE()
624 ((FLEXSPI0->STS0 & FLEXSPI_STS0_SEQIDLE_MASK) != 0U))) in AT_QUICKACCESS_SECTION_CODE()
635 while (!(((FLEXSPI1->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) != 0U) && in AT_QUICKACCESS_SECTION_CODE()
636 ((FLEXSPI1->STS0 & FLEXSPI_STS0_SEQIDLE_MASK) != 0U))) in AT_QUICKACCESS_SECTION_CODE()
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| /hal_nxp-latest/mcux/mcux-sdk/boards/rdrw612bga/ |
| D | board.c | 310 while (!((base->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) && (base->STS0 & FLEXSPI_STS0_SEQIDLE_MASK))) in BOARD_DeinitFlash()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/semc/ |
| D | fsl_semc.h | 829 return ((base->STS0 & SEMC_STS0_IDLE_MASK) != 0x00U) ? true : false; in SEMC_IsInIdle()
874 return ((base->STS0 & SEMC_STS0_NARDY_MASK) != 0x00U) ? true : false; in SEMC_IsNandReady()
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| D | fsl_semc.c | 398 while ((base->STS0 & (uint32_t)SEMC_STS0_IDLE_MASK) == 0x00U) in SEMC_Deinit()
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| /hal_nxp-latest/mcux/mcux-sdk/boards/mimxrt685audevk/ |
| D | board.c | 297 while (!((base->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) && (base->STS0 & FLEXSPI_STS0_SEQIDLE_MASK))) in BOARD_DeinitXip()
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| /hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt685/ |
| D | board.c | 304 while (!((base->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) && (base->STS0 & FLEXSPI_STS0_SEQIDLE_MASK))) in BOARD_DeinitXip()
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| /hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt595/ |
| D | board.c | 300 while (!((base->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) && (base->STS0 & FLEXSPI_STS0_SEQIDLE_MASK))) in BOARD_DeinitFlash()
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| /hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1180/ |
| D | board.c | 642 while (!((base->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) && (base->STS0 & FLEXSPI_STS0_SEQIDLE_MASK))) in BOARD_DeinitFlash()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/drivers/ |
| D | fsl_power.c | 626 while (!(((FLEXSPI->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) != 0U) && in AT_QUICKACCESS_SECTION_CODE()
627 ((FLEXSPI->STS0 & FLEXSPI_STS0_SEQIDLE_MASK) != 0U))) in AT_QUICKACCESS_SECTION_CODE()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/drivers/ |
| D | fsl_power.c | 626 while (!(((FLEXSPI->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) != 0U) && in AT_QUICKACCESS_SECTION_CODE()
627 ((FLEXSPI->STS0 & FLEXSPI_STS0_SEQIDLE_MASK) != 0U))) in AT_QUICKACCESS_SECTION_CODE()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/RW612/drivers/ |
| D | fsl_power.c | 609 while (!(((FLEXSPI->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) != 0U) && in AT_QUICKACCESS_SECTION_CODE()
610 ((FLEXSPI->STS0 & FLEXSPI_STS0_SEQIDLE_MASK) != 0U))) in AT_QUICKACCESS_SECTION_CODE()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/RW610/drivers/ |
| D | fsl_power.c | 609 while (!(((FLEXSPI->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) != 0U) && in AT_QUICKACCESS_SECTION_CODE()
610 ((FLEXSPI->STS0 & FLEXSPI_STS0_SEQIDLE_MASK) != 0U))) in AT_QUICKACCESS_SECTION_CODE()
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| /hal_nxp-latest/mcux/mcux-sdk/boards/evkmimx8ulp/ |
| D | board.c | 1506 while (!((base->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) && (base->STS0 & FLEXSPI_STS0_SEQIDLE_MASK))) in BOARD_DeinitXip()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/ |
| D | MIMXRT1024.h | 19255 __I uint32_t STS0; /**< Status Register 0, offset: 0xE0 */ member
33248 __I uint32_t STS0; /**< Status Register 0, offset: 0xC0 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/ |
| D | MIMXRT1021.h | 19275 __I uint32_t STS0; /**< Status Register 0, offset: 0xE0 */ member
33269 __I uint32_t STS0; /**< Status Register 0, offset: 0xC0 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/ |
| D | MIMXRT1051.h | 20232 __I uint32_t STS0; /**< Status Register 0, offset: 0xE0 */ member
34832 __I uint32_t STS0; /**< Status register 0, offset: 0xC0 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/ |
| D | MIMXRT1041.h | 21384 __I uint32_t STS0; /**< Status Register 0, offset: 0xE0 */ member
36049 __I uint32_t STS0; /**< Status Register 0, offset: 0xC0 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/ |
| D | MIMXRT1052.h | 21017 __I uint32_t STS0; /**< Status Register 0, offset: 0xE0 */ member
39098 __I uint32_t STS0; /**< Status register 0, offset: 0xC0 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/ |
| D | MIMXRT1042.h | 21386 __I uint32_t STS0; /**< Status Register 0, offset: 0xE0 */ member
39459 __I uint32_t STS0; /**< Status Register 0, offset: 0xC0 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/ |
| D | MIMXRT1061.h | 21761 __I uint32_t STS0; /**< Status Register 0, offset: 0xE0 */ member
36933 __I uint32_t STS0; /**< Status Register 0, offset: 0xC0 */ member
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