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Searched refs:SPC_SC_ISO_CLR_MASK (Results 1 – 25 of 28) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/spc/
Dfsl_spc.h420 base->SC |= SPC_SC_ISO_CLR_MASK; in SPC_ClearPeriphIOIsolationFlag()
Dfsl_spc.c69 return (uint8_t)((reg & SPC_SC_ISO_CLR_MASK) >> SPC_SC_ISO_CLR_SHIFT); in SPC_GetPeriphIOIsolationStatus()
/hal_nxp-latest/mcux/mcux-sdk/drivers/mcx_spc/
Dfsl_spc.h533 base->SC |= SPC_SC_ISO_CLR_MASK; in SPC_ClearPeriphIOIsolationFlag()
Dfsl_spc.c71 return (uint8_t)((reg & SPC_SC_ISO_CLR_MASK) >> SPC_SC_ISO_CLR_SHIFT); in SPC_GetPeriphIOIsolationStatus()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/
DMCXA142.h25318 #define SPC_SC_ISO_CLR_MASK (0x10000U) macro
25321 … (((uint32_t)(((uint32_t)(x)) << SPC_SC_ISO_CLR_SHIFT)) & SPC_SC_ISO_CLR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/
DMCXA143.h25318 #define SPC_SC_ISO_CLR_MASK (0x10000U) macro
25321 … (((uint32_t)(((uint32_t)(x)) << SPC_SC_ISO_CLR_SHIFT)) & SPC_SC_ISO_CLR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/
DMCXA153.h25318 #define SPC_SC_ISO_CLR_MASK (0x10000U) macro
25321 … (((uint32_t)(((uint32_t)(x)) << SPC_SC_ISO_CLR_SHIFT)) & SPC_SC_ISO_CLR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/
DMCXA152.h25318 #define SPC_SC_ISO_CLR_MASK (0x10000U) macro
25321 … (((uint32_t)(((uint32_t)(x)) << SPC_SC_ISO_CLR_SHIFT)) & SPC_SC_ISO_CLR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h32611 #define SPC_SC_ISO_CLR_MASK (0x10000U) macro
32614 … (((uint32_t)(((uint32_t)(x)) << SPC_SC_ISO_CLR_SHIFT)) & SPC_SC_ISO_CLR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h32611 #define SPC_SC_ISO_CLR_MASK (0x10000U) macro
32614 … (((uint32_t)(((uint32_t)(x)) << SPC_SC_ISO_CLR_SHIFT)) & SPC_SC_ISO_CLR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h32611 #define SPC_SC_ISO_CLR_MASK (0x10000U) macro
32614 … (((uint32_t)(((uint32_t)(x)) << SPC_SC_ISO_CLR_SHIFT)) & SPC_SC_ISO_CLR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/
DMCXA156.h33233 #define SPC_SC_ISO_CLR_MASK (0x10000U) macro
33236 … (((uint32_t)(((uint32_t)(x)) << SPC_SC_ISO_CLR_SHIFT)) & SPC_SC_ISO_CLR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/
DMCXA154.h33233 #define SPC_SC_ISO_CLR_MASK (0x10000U) macro
33236 … (((uint32_t)(((uint32_t)(x)) << SPC_SC_ISO_CLR_SHIFT)) & SPC_SC_ISO_CLR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/
DMCXA155.h33233 #define SPC_SC_ISO_CLR_MASK (0x10000U) macro
33236 … (((uint32_t)(((uint32_t)(x)) << SPC_SC_ISO_CLR_SHIFT)) & SPC_SC_ISO_CLR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716A/
DMCXW716A.h33086 #define SPC_SC_ISO_CLR_MASK (0x70000U) macro
33089 … (((uint32_t)(((uint32_t)(x)) << SPC_SC_ISO_CLR_SHIFT)) & SPC_SC_ISO_CLR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716C/
DMCXW716C.h35255 #define SPC_SC_ISO_CLR_MASK (0x70000U) macro
35258 … (((uint32_t)(((uint32_t)(x)) << SPC_SC_ISO_CLR_SHIFT)) & SPC_SC_ISO_CLR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h54377 #define SPC_SC_ISO_CLR_MASK (0x30000U) macro
54380 … (((uint32_t)(((uint32_t)(x)) << SPC_SC_ISO_CLR_SHIFT)) & SPC_SC_ISO_CLR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h54335 #define SPC_SC_ISO_CLR_MASK (0x30000U) macro
54338 … (((uint32_t)(((uint32_t)(x)) << SPC_SC_ISO_CLR_SHIFT)) & SPC_SC_ISO_CLR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW727C/
DMCXW727C_cm33_core0.h40072 #define SPC_SC_ISO_CLR_MASK (0x70000U) macro
40075 … (((uint32_t)(((uint32_t)(x)) << SPC_SC_ISO_CLR_SHIFT)) & SPC_SC_ISO_CLR_MASK)
DMCXW727C_cm33_core1.h45262 #define SPC_SC_ISO_CLR_MASK (0x70000U) macro
45265 … (((uint32_t)(((uint32_t)(x)) << SPC_SC_ISO_CLR_SHIFT)) & SPC_SC_ISO_CLR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h68691 #define SPC_SC_ISO_CLR_MASK (0x30000U) macro
68694 … (((uint32_t)(((uint32_t)(x)) << SPC_SC_ISO_CLR_SHIFT)) & SPC_SC_ISO_CLR_MASK)
DMCXN546_cm33_core1.h68691 #define SPC_SC_ISO_CLR_MASK (0x30000U) macro
68694 … (((uint32_t)(((uint32_t)(x)) << SPC_SC_ISO_CLR_SHIFT)) & SPC_SC_ISO_CLR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h68691 #define SPC_SC_ISO_CLR_MASK (0x30000U) macro
68694 … (((uint32_t)(((uint32_t)(x)) << SPC_SC_ISO_CLR_SHIFT)) & SPC_SC_ISO_CLR_MASK)
DMCXN547_cm33_core1.h68691 #define SPC_SC_ISO_CLR_MASK (0x30000U) macro
68694 … (((uint32_t)(((uint32_t)(x)) << SPC_SC_ISO_CLR_SHIFT)) & SPC_SC_ISO_CLR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h71357 #define SPC_SC_ISO_CLR_MASK (0x30000U) macro
71360 … (((uint32_t)(((uint32_t)(x)) << SPC_SC_ISO_CLR_SHIFT)) & SPC_SC_ISO_CLR_MASK)

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