Home
last modified time | relevance | path

Searched refs:SIRCCSR (Results 1 – 25 of 119) sorted by relevance

12345

/hal_nxp-latest/s32/drivers/s32k1/Mcu/src/
DClock_Ip_IntOsc.c475 IP_SCG->SIRCCSR &= (~((uint32)SCG_SIRCCSR_LK_MASK)); in Clock_Ip_SetSirc_TrustedCall()
478 IP_SCG->SIRCCSR &= (~((uint32)SCG_SIRCCSR_SIRCEN_MASK)); in Clock_Ip_SetSirc_TrustedCall()
481 IP_SCG->SIRCCSR &= (~((uint32)SCG_SIRCCSR_SIRCLPEN_MASK)); in Clock_Ip_SetSirc_TrustedCall()
490 IP_SCG->SIRCCSR |= SCG_SIRCCSR_SIRCEN(1U); in Clock_Ip_SetSirc_TrustedCall()
493 IP_SCG->SIRCCSR |= SCG_SIRCCSR_SIRCLPEN(SircConfig.LowPowerModeEnable); in Clock_Ip_SetSirc_TrustedCall()
499 … IrcoscStatus = (((IP_SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) >> SCG_SIRCCSR_SIRCVLD_SHIFT)); in Clock_Ip_SetSirc_TrustedCall()
520 IP_SCG->SIRCCSR |= SCG_SIRCCSR_SIRCEN(1U); in Clock_Ip_EnableSirc_TrustedCall()
523 IP_SCG->SIRCCSR |= SCG_SIRCCSR_SIRCLPEN(1UL); in Clock_Ip_EnableSirc_TrustedCall()
529 … IrcoscStatus = (((IP_SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) >> SCG_SIRCCSR_SIRCVLD_SHIFT)); in Clock_Ip_EnableSirc_TrustedCall()
545 IP_SCG->SIRCCSR &= ~SCG_SIRCCSR_SIRCEN_MASK; in Clock_Ip_DisableSirc_TrustedCall()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW727C/drivers/
Dfsl_clock.c428 CLOCK_REG(&SCG0->SIRCCSR) = (uint32_t)config->enableMode; in CLOCK_InitSirc()
438 while ((CLOCK_REG(&SCG0->SIRCCSR) & SCG_SIRCCSR_SIRCVLD_MASK) != SCG_SIRCCSR_SIRCVLD_MASK) in CLOCK_InitSirc()
458 uint32_t reg = CLOCK_REG(&SCG0->SIRCCSR); in CLOCK_DeinitSirc()
472 CLOCK_REG(&SCG0->SIRCCSR) = 0U; in CLOCK_DeinitSirc()
490 …if ((CLOCK_REG(&SCG0->SIRCCSR) & SCG_SIRCCSR_SIRCVLD_MASK) == SCG_SIRCCSR_SIRCVLD_MASK) /* SIRC is… in CLOCK_GetSircFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716C/drivers/
Dfsl_clock.c427 CLOCK_REG(&SCG0->SIRCCSR) = (uint32_t)config->enableMode; in CLOCK_InitSirc()
437 while ((CLOCK_REG(&SCG0->SIRCCSR) & SCG_SIRCCSR_SIRCVLD_MASK) != SCG_SIRCCSR_SIRCVLD_MASK) in CLOCK_InitSirc()
457 uint32_t reg = CLOCK_REG(&SCG0->SIRCCSR); in CLOCK_DeinitSirc()
471 CLOCK_REG(&SCG0->SIRCCSR) = 0U; in CLOCK_DeinitSirc()
489 …if ((CLOCK_REG(&SCG0->SIRCCSR) & SCG_SIRCCSR_SIRCVLD_MASK) == SCG_SIRCCSR_SIRCVLD_MASK) /* SIRC is… in CLOCK_GetSircFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716A/drivers/
Dfsl_clock.c427 CLOCK_REG(&SCG0->SIRCCSR) = (uint32_t)config->enableMode; in CLOCK_InitSirc()
437 while ((CLOCK_REG(&SCG0->SIRCCSR) & SCG_SIRCCSR_SIRCVLD_MASK) != SCG_SIRCCSR_SIRCVLD_MASK) in CLOCK_InitSirc()
457 uint32_t reg = CLOCK_REG(&SCG0->SIRCCSR); in CLOCK_DeinitSirc()
471 CLOCK_REG(&SCG0->SIRCCSR) = 0U; in CLOCK_DeinitSirc()
489 …if ((CLOCK_REG(&SCG0->SIRCCSR) & SCG_SIRCCSR_SIRCVLD_MASK) == SCG_SIRCCSR_SIRCVLD_MASK) /* SIRC is… in CLOCK_GetSircFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/drivers/
Dfsl_clock.c260 SCG0->SIRCCSR &= ~SCG_SIRCCSR_LK_MASK; in CLOCK_SetupFRO12MClocking()
263 SCG0->SIRCCSR |= SCG_SIRCCSR_SIRC_CLK_PERIPH_EN_MASK; in CLOCK_SetupFRO12MClocking()
266 SCG0->SIRCCSR |= SCG_SIRCCSR_LK_MASK; in CLOCK_SetupFRO12MClocking()
269 while ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) == 0U) in CLOCK_SetupFRO12MClocking()
456 return ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRC_CLK_PERIPH_EN_MASK) != 0U) ? 12000000U : 0U; in CLOCK_GetFro12MFreq()
1119 SCG0->SIRCCSR = (uint32_t)config.trimMode; in CLOCK_FRO12MTrimConfig()
1121 if ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRCERR_MASK) == SCG_SIRCCSR_SIRCERR_MASK) in CLOCK_FRO12MTrimConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/drivers/
Dfsl_clock.c260 SCG0->SIRCCSR &= ~SCG_SIRCCSR_LK_MASK; in CLOCK_SetupFRO12MClocking()
263 SCG0->SIRCCSR |= SCG_SIRCCSR_SIRC_CLK_PERIPH_EN_MASK; in CLOCK_SetupFRO12MClocking()
266 SCG0->SIRCCSR |= SCG_SIRCCSR_LK_MASK; in CLOCK_SetupFRO12MClocking()
269 while ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) == 0U) in CLOCK_SetupFRO12MClocking()
456 return ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRC_CLK_PERIPH_EN_MASK) != 0U) ? 12000000U : 0U; in CLOCK_GetFro12MFreq()
1119 SCG0->SIRCCSR = (uint32_t)config.trimMode; in CLOCK_FRO12MTrimConfig()
1121 if ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRCERR_MASK) == SCG_SIRCCSR_SIRCERR_MASK) in CLOCK_FRO12MTrimConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/drivers/
Dfsl_clock.c260 SCG0->SIRCCSR &= ~SCG_SIRCCSR_LK_MASK; in CLOCK_SetupFRO12MClocking()
263 SCG0->SIRCCSR |= SCG_SIRCCSR_SIRC_CLK_PERIPH_EN_MASK; in CLOCK_SetupFRO12MClocking()
266 SCG0->SIRCCSR |= SCG_SIRCCSR_LK_MASK; in CLOCK_SetupFRO12MClocking()
269 while ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) == 0U) in CLOCK_SetupFRO12MClocking()
456 return ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRC_CLK_PERIPH_EN_MASK) != 0U) ? 12000000U : 0U; in CLOCK_GetFro12MFreq()
1119 SCG0->SIRCCSR = (uint32_t)config.trimMode; in CLOCK_FRO12MTrimConfig()
1121 if ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRCERR_MASK) == SCG_SIRCCSR_SIRCERR_MASK) in CLOCK_FRO12MTrimConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/drivers/
Dfsl_clock.c260 SCG0->SIRCCSR &= ~SCG_SIRCCSR_LK_MASK; in CLOCK_SetupFRO12MClocking()
263 SCG0->SIRCCSR |= SCG_SIRCCSR_SIRC_CLK_PERIPH_EN_MASK; in CLOCK_SetupFRO12MClocking()
266 SCG0->SIRCCSR |= SCG_SIRCCSR_LK_MASK; in CLOCK_SetupFRO12MClocking()
269 while ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) == 0U) in CLOCK_SetupFRO12MClocking()
456 return ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRC_CLK_PERIPH_EN_MASK) != 0U) ? 12000000U : 0U; in CLOCK_GetFro12MFreq()
1119 SCG0->SIRCCSR = (uint32_t)config.trimMode; in CLOCK_FRO12MTrimConfig()
1121 if ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRCERR_MASK) == SCG_SIRCCSR_SIRCERR_MASK) in CLOCK_FRO12MTrimConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/drivers/
Dfsl_clock.c260 SCG0->SIRCCSR &= ~SCG_SIRCCSR_LK_MASK; in CLOCK_SetupFRO12MClocking()
263 SCG0->SIRCCSR |= SCG_SIRCCSR_SIRC_CLK_PERIPH_EN_MASK; in CLOCK_SetupFRO12MClocking()
266 SCG0->SIRCCSR |= SCG_SIRCCSR_LK_MASK; in CLOCK_SetupFRO12MClocking()
269 while ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) == 0U) in CLOCK_SetupFRO12MClocking()
456 return ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRC_CLK_PERIPH_EN_MASK) != 0U) ? 12000000U : 0U; in CLOCK_GetFro12MFreq()
1300 SCG0->SIRCCSR = (uint32_t)config.trimMode; in CLOCK_FRO12MTrimConfig()
1302 if ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRCERR_MASK) == SCG_SIRCCSR_SIRCERR_MASK) in CLOCK_FRO12MTrimConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/drivers/
Dfsl_clock.c260 SCG0->SIRCCSR &= ~SCG_SIRCCSR_LK_MASK; in CLOCK_SetupFRO12MClocking()
263 SCG0->SIRCCSR |= SCG_SIRCCSR_SIRC_CLK_PERIPH_EN_MASK; in CLOCK_SetupFRO12MClocking()
266 SCG0->SIRCCSR |= SCG_SIRCCSR_LK_MASK; in CLOCK_SetupFRO12MClocking()
269 while ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) == 0U) in CLOCK_SetupFRO12MClocking()
456 return ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRC_CLK_PERIPH_EN_MASK) != 0U) ? 12000000U : 0U; in CLOCK_GetFro12MFreq()
1300 SCG0->SIRCCSR = (uint32_t)config.trimMode; in CLOCK_FRO12MTrimConfig()
1302 if ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRCERR_MASK) == SCG_SIRCCSR_SIRCERR_MASK) in CLOCK_FRO12MTrimConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/drivers/
Dfsl_clock.c260 SCG0->SIRCCSR &= ~SCG_SIRCCSR_LK_MASK; in CLOCK_SetupFRO12MClocking()
263 SCG0->SIRCCSR |= SCG_SIRCCSR_SIRC_CLK_PERIPH_EN_MASK; in CLOCK_SetupFRO12MClocking()
266 SCG0->SIRCCSR |= SCG_SIRCCSR_LK_MASK; in CLOCK_SetupFRO12MClocking()
269 while ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) == 0U) in CLOCK_SetupFRO12MClocking()
456 return ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRC_CLK_PERIPH_EN_MASK) != 0U) ? 12000000U : 0U; in CLOCK_GetFro12MFreq()
1300 SCG0->SIRCCSR = (uint32_t)config.trimMode; in CLOCK_FRO12MTrimConfig()
1302 if ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRCERR_MASK) == SCG_SIRCCSR_SIRCERR_MASK) in CLOCK_FRO12MTrimConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/drivers/
Dfsl_clock.c260 SCG0->SIRCCSR &= ~SCG_SIRCCSR_LK_MASK; in CLOCK_SetupFRO12MClocking()
263 SCG0->SIRCCSR |= SCG_SIRCCSR_SIRC_CLK_PERIPH_EN_MASK; in CLOCK_SetupFRO12MClocking()
266 SCG0->SIRCCSR |= SCG_SIRCCSR_LK_MASK; in CLOCK_SetupFRO12MClocking()
269 while ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) == 0U) in CLOCK_SetupFRO12MClocking()
456 return ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRC_CLK_PERIPH_EN_MASK) != 0U) ? 12000000U : 0U; in CLOCK_GetFro12MFreq()
1300 SCG0->SIRCCSR = (uint32_t)config.trimMode; in CLOCK_FRO12MTrimConfig()
1302 if ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRCERR_MASK) == SCG_SIRCCSR_SIRCERR_MASK) in CLOCK_FRO12MTrimConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/drivers/
Dfsl_clock.c260 SCG0->SIRCCSR &= ~SCG_SIRCCSR_LK_MASK; in CLOCK_SetupFRO12MClocking()
263 SCG0->SIRCCSR |= SCG_SIRCCSR_SIRC_CLK_PERIPH_EN_MASK; in CLOCK_SetupFRO12MClocking()
266 SCG0->SIRCCSR |= SCG_SIRCCSR_LK_MASK; in CLOCK_SetupFRO12MClocking()
269 while ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) == 0U) in CLOCK_SetupFRO12MClocking()
456 return ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRC_CLK_PERIPH_EN_MASK) != 0U) ? 12000000U : 0U; in CLOCK_GetFro12MFreq()
1300 SCG0->SIRCCSR = (uint32_t)config.trimMode; in CLOCK_FRO12MTrimConfig()
1302 if ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRCERR_MASK) == SCG_SIRCCSR_SIRCERR_MASK) in CLOCK_FRO12MTrimConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/drivers/
Dfsl_clock.c260 SCG0->SIRCCSR &= ~SCG_SIRCCSR_LK_MASK; in CLOCK_SetupFRO12MClocking()
263 SCG0->SIRCCSR |= SCG_SIRCCSR_SIRC_CLK_PERIPH_EN_MASK; in CLOCK_SetupFRO12MClocking()
266 SCG0->SIRCCSR |= SCG_SIRCCSR_LK_MASK; in CLOCK_SetupFRO12MClocking()
269 while ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) == 0U) in CLOCK_SetupFRO12MClocking()
456 return ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRC_CLK_PERIPH_EN_MASK) != 0U) ? 12000000U : 0U; in CLOCK_GetFro12MFreq()
1300 SCG0->SIRCCSR = (uint32_t)config.trimMode; in CLOCK_FRO12MTrimConfig()
1302 if ((SCG0->SIRCCSR & SCG_SIRCCSR_SIRCERR_MASK) == SCG_SIRCCSR_SIRCERR_MASK) in CLOCK_FRO12MTrimConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/drivers/
Dfsl_clock.c485 SCG->SIRCCSR = SCG_SIRCCSR_SIRCEN_MASK | config->enableMode; in CLOCK_InitSirc()
488 while (0UL == (SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK)) in CLOCK_InitSirc()
509 uint32_t reg = SCG->SIRCCSR; in CLOCK_DeinitSirc()
524 SCG->SIRCCSR = 0U; in CLOCK_DeinitSirc()
541 if ((SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) != 0UL) /* SIRC is valid. */ in CLOCK_GetSircFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/drivers/
Dfsl_clock.c406 SCG->SIRCCSR = SCG_SIRCCSR_SIRCEN_MASK | config->enableMode; in CLOCK_InitSirc()
409 while (0UL == (SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK)) in CLOCK_InitSirc()
429 uint32_t reg = SCG->SIRCCSR; in CLOCK_DeinitSirc()
443 SCG->SIRCCSR = 0U; in CLOCK_DeinitSirc()
457 if ((SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) != 0UL) /* SIRC is valid. */ in CLOCK_GetSircFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/drivers/
Dfsl_clock.c465 SCG->SIRCCSR = SCG_SIRCCSR_SIRCEN_MASK | config->enableMode; in CLOCK_InitSirc()
468 while (0UL == (SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK)) in CLOCK_InitSirc()
489 uint32_t reg = SCG->SIRCCSR; in CLOCK_DeinitSirc()
504 SCG->SIRCCSR = 0U; in CLOCK_DeinitSirc()
521 if ((SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) != 0UL) /* SIRC is valid. */ in CLOCK_GetSircFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/drivers/
Dfsl_clock.c486 SCG->SIRCCSR = SCG_SIRCCSR_SIRCEN_MASK | config->enableMode; in CLOCK_InitSirc()
489 while (0UL == (SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK)) in CLOCK_InitSirc()
510 uint32_t reg = SCG->SIRCCSR; in CLOCK_DeinitSirc()
525 SCG->SIRCCSR = 0U; in CLOCK_DeinitSirc()
542 if ((SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) != 0UL) /* SIRC is valid. */ in CLOCK_GetSircFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z9/drivers/
Dfsl_clock.c485 SCG->SIRCCSR = SCG_SIRCCSR_SIRCEN_MASK | config->enableMode; in CLOCK_InitSirc()
488 while (0UL == (SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK)) in CLOCK_InitSirc()
509 uint32_t reg = SCG->SIRCCSR; in CLOCK_DeinitSirc()
524 SCG->SIRCCSR = 0U; in CLOCK_DeinitSirc()
541 if ((SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) != 0UL) /* SIRC is valid. */ in CLOCK_GetSircFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z7/drivers/
Dfsl_clock.c486 SCG->SIRCCSR = SCG_SIRCCSR_SIRCEN_MASK | config->enableMode; in CLOCK_InitSirc()
489 while (0UL == (SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK)) in CLOCK_InitSirc()
510 uint32_t reg = SCG->SIRCCSR; in CLOCK_DeinitSirc()
525 SCG->SIRCCSR = 0U; in CLOCK_DeinitSirc()
542 if ((SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) != 0UL) /* SIRC is valid. */ in CLOCK_GetSircFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z9/drivers/
Dfsl_clock.c485 SCG->SIRCCSR = SCG_SIRCCSR_SIRCEN_MASK | config->enableMode; in CLOCK_InitSirc()
488 while (0UL == (SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK)) in CLOCK_InitSirc()
509 uint32_t reg = SCG->SIRCCSR; in CLOCK_DeinitSirc()
524 SCG->SIRCCSR = 0U; in CLOCK_DeinitSirc()
541 if ((SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) != 0UL) /* SIRC is valid. */ in CLOCK_GetSircFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/drivers/
Dfsl_clock.c465 SCG->SIRCCSR = SCG_SIRCCSR_SIRCEN_MASK | config->enableMode; in CLOCK_InitSirc()
468 while (0UL == (SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK)) in CLOCK_InitSirc()
489 uint32_t reg = SCG->SIRCCSR; in CLOCK_DeinitSirc()
504 SCG->SIRCCSR = 0U; in CLOCK_DeinitSirc()
521 if ((SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) != 0UL) /* SIRC is valid. */ in CLOCK_GetSircFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/drivers/
Dfsl_clock.c465 SCG->SIRCCSR = SCG_SIRCCSR_SIRCEN_MASK | config->enableMode; in CLOCK_InitSirc()
468 while (0UL == (SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK)) in CLOCK_InitSirc()
489 uint32_t reg = SCG->SIRCCSR; in CLOCK_DeinitSirc()
504 SCG->SIRCCSR = 0U; in CLOCK_DeinitSirc()
521 if ((SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) != 0UL) /* SIRC is valid. */ in CLOCK_GetSircFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/drivers/
Dfsl_clock.c489 SCG->SIRCCSR = SCG_SIRCCSR_SIRCEN_MASK | config->enableMode; in CLOCK_InitSirc()
492 while (0UL == (SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK)) in CLOCK_InitSirc()
513 uint32_t reg = SCG->SIRCCSR; in CLOCK_DeinitSirc()
528 SCG->SIRCCSR = 0U; in CLOCK_DeinitSirc()
545 if ((SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) != 0UL) /* SIRC is valid. */ in CLOCK_GetSircFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z7/drivers/
Dfsl_clock.c530 SCG->SIRCCSR = SCG_SIRCCSR_SIRCEN_MASK | config->enableMode; in CLOCK_InitSirc()
533 while (0UL == (SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK)) in CLOCK_InitSirc()
554 uint32_t reg = SCG->SIRCCSR; in CLOCK_DeinitSirc()
569 SCG->SIRCCSR = 0U; in CLOCK_DeinitSirc()
586 if ((SCG->SIRCCSR & SCG_SIRCCSR_SIRCVLD_MASK) != 0UL) /* SIRC is valid. */ in CLOCK_GetSircFreq()

12345