Home
last modified time | relevance | path

Searched refs:SINC_CCR_FIFOEN_MASK (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_SINC.h808 #define SINC_CCR_FIFOEN_MASK (0x4000U) macro
811 … (((uint32_t)(((uint32_t)(x)) << SINC_CCR_FIFOEN_SHIFT)) & SINC_CCR_FIFOEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/drivers/sinc/
Dfsl_sinc.h1118 base->CHANNEL[(uint8_t)chId].CCR |= SINC_CCR_FIFOEN_MASK; in SINC_EnableChannelFIFO()
1122 base->CHANNEL[(uint8_t)chId].CCR &= ~SINC_CCR_FIFOEN_MASK; in SINC_EnableChannelFIFO()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h70539 #define SINC_CCR_FIFOEN_MASK (0x4000U) macro
70545 … (((uint32_t)(((uint32_t)(x)) << SINC_CCR_FIFOEN_SHIFT)) & SINC_CCR_FIFOEN_MASK)
DMCXN947_cm33_core0.h70539 #define SINC_CCR_FIFOEN_MASK (0x4000U) macro
70545 … (((uint32_t)(((uint32_t)(x)) << SINC_CCR_FIFOEN_SHIFT)) & SINC_CCR_FIFOEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h70539 #define SINC_CCR_FIFOEN_MASK (0x4000U) macro
70545 … (((uint32_t)(((uint32_t)(x)) << SINC_CCR_FIFOEN_SHIFT)) & SINC_CCR_FIFOEN_MASK)
DMCXN946_cm33_core1.h70539 #define SINC_CCR_FIFOEN_MASK (0x4000U) macro
70545 … (((uint32_t)(((uint32_t)(x)) << SINC_CCR_FIFOEN_SHIFT)) & SINC_CCR_FIFOEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1187/
DMIMXRT1187_cm33.h77127 #define SINC_CCR_FIFOEN_MASK (0x4000U) macro
77133 … (((uint32_t)(((uint32_t)(x)) << SINC_CCR_FIFOEN_SHIFT)) & SINC_CCR_FIFOEN_MASK)
DMIMXRT1187_cm7.h75082 #define SINC_CCR_FIFOEN_MASK (0x4000U) macro
75088 … (((uint32_t)(((uint32_t)(x)) << SINC_CCR_FIFOEN_SHIFT)) & SINC_CCR_FIFOEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1189/
DMIMXRT1189_cm33.h80975 #define SINC_CCR_FIFOEN_MASK (0x4000U) macro
80981 … (((uint32_t)(((uint32_t)(x)) << SINC_CCR_FIFOEN_SHIFT)) & SINC_CCR_FIFOEN_MASK)
DMIMXRT1189_cm7.h78911 #define SINC_CCR_FIFOEN_MASK (0x4000U) macro
78917 … (((uint32_t)(((uint32_t)(x)) << SINC_CCR_FIFOEN_SHIFT)) & SINC_CCR_FIFOEN_MASK)