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Searched refs:SINC_CCR_DBGSEL_MASK (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_SINC.h813 #define SINC_CCR_DBGSEL_MASK (0xF00000U) macro
816 … (((uint32_t)(((uint32_t)(x)) << SINC_CCR_DBGSEL_SHIFT)) & SINC_CCR_DBGSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/drivers/sinc/
Dfsl_sinc.h1857 ((base->CHANNEL[(uint8_t)chId].CCR & ~SINC_CCR_DBGSEL_MASK) | SINC_CCR_DBGSEL(debugOutput)); in SINC_SetChannelDebugOutput()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h70547 #define SINC_CCR_DBGSEL_MASK (0xF00000U) macro
70562 … (((uint32_t)(((uint32_t)(x)) << SINC_CCR_DBGSEL_SHIFT)) & SINC_CCR_DBGSEL_MASK)
DMCXN947_cm33_core0.h70547 #define SINC_CCR_DBGSEL_MASK (0xF00000U) macro
70562 … (((uint32_t)(((uint32_t)(x)) << SINC_CCR_DBGSEL_SHIFT)) & SINC_CCR_DBGSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h70547 #define SINC_CCR_DBGSEL_MASK (0xF00000U) macro
70562 … (((uint32_t)(((uint32_t)(x)) << SINC_CCR_DBGSEL_SHIFT)) & SINC_CCR_DBGSEL_MASK)
DMCXN946_cm33_core1.h70547 #define SINC_CCR_DBGSEL_MASK (0xF00000U) macro
70562 … (((uint32_t)(((uint32_t)(x)) << SINC_CCR_DBGSEL_SHIFT)) & SINC_CCR_DBGSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1187/
DMIMXRT1187_cm33.h77135 #define SINC_CCR_DBGSEL_MASK (0xF00000U) macro
77150 … (((uint32_t)(((uint32_t)(x)) << SINC_CCR_DBGSEL_SHIFT)) & SINC_CCR_DBGSEL_MASK)
DMIMXRT1187_cm7.h75090 #define SINC_CCR_DBGSEL_MASK (0xF00000U) macro
75105 … (((uint32_t)(((uint32_t)(x)) << SINC_CCR_DBGSEL_SHIFT)) & SINC_CCR_DBGSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1189/
DMIMXRT1189_cm33.h80983 #define SINC_CCR_DBGSEL_MASK (0xF00000U) macro
80998 … (((uint32_t)(((uint32_t)(x)) << SINC_CCR_DBGSEL_SHIFT)) & SINC_CCR_DBGSEL_MASK)
DMIMXRT1189_cm7.h78919 #define SINC_CCR_DBGSEL_MASK (0xF00000U) macro
78934 … (((uint32_t)(((uint32_t)(x)) << SINC_CCR_DBGSEL_SHIFT)) & SINC_CCR_DBGSEL_MASK)