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Searched refs:SIM_SCGC_FTM0_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MKE04Z4/
DMKE04Z4.h5010 #define SIM_SCGC_FTM0_MASK (0x20U) macro
5016 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC_FTM0_SHIFT)) & SIM_SCGC_FTM0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE02Z4/
DMKE02Z4.h5231 #define SIM_SCGC_FTM0_MASK (0x20U) macro
5237 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC_FTM0_SHIFT)) & SIM_SCGC_FTM0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE04Z1284/
DMKE04Z1284.h5716 #define SIM_SCGC_FTM0_MASK (0x20U) macro
5722 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC_FTM0_SHIFT)) & SIM_SCGC_FTM0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE06Z4/
DMKE06Z4.h6497 #define SIM_SCGC_FTM0_MASK (0x20U) macro
6503 … (((uint32_t)(((uint32_t)(x)) << SIM_SCGC_FTM0_SHIFT)) & SIM_SCGC_FTM0_MASK)