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Searched refs:SCT_EVEN_IEN0_MASK (Results 1 – 25 of 29) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h38713 #define SCT_EVEN_IEN0_MASK (0x1U) macro
38719 … (((uint32_t)(((uint32_t)(x)) << SCT_EVEN_IEN0_SHIFT)) & SCT_EVEN_IEN0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h38713 #define SCT_EVEN_IEN0_MASK (0x1U) macro
38719 … (((uint32_t)(((uint32_t)(x)) << SCT_EVEN_IEN0_SHIFT)) & SCT_EVEN_IEN0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h39786 #define SCT_EVEN_IEN0_MASK (0x1U) macro
39792 … (((uint32_t)(((uint32_t)(x)) << SCT_EVEN_IEN0_SHIFT)) & SCT_EVEN_IEN0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_cm33.h41413 #define SCT_EVEN_IEN0_MASK (0x1U) macro
41419 … (((uint32_t)(((uint32_t)(x)) << SCT_EVEN_IEN0_SHIFT)) & SCT_EVEN_IEN0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h44532 #define SCT_EVEN_IEN0_MASK (0x1U) macro
44538 … (((uint32_t)(((uint32_t)(x)) << SCT_EVEN_IEN0_SHIFT)) & SCT_EVEN_IEN0_MASK)
DMIMXRT735S_cm33_core1.h44592 #define SCT_EVEN_IEN0_MASK (0x1U) macro
44598 … (((uint32_t)(((uint32_t)(x)) << SCT_EVEN_IEN0_SHIFT)) & SCT_EVEN_IEN0_MASK)
DMIMXRT735S_ezhv.h62786 #define SCT_EVEN_IEN0_MASK (0x1U) macro
62792 … (((uint32_t)(((uint32_t)(x)) << SCT_EVEN_IEN0_SHIFT)) & SCT_EVEN_IEN0_MASK)
DMIMXRT735S_cm33_core0.h62470 #define SCT_EVEN_IEN0_MASK (0x1U) macro
62476 … (((uint32_t)(((uint32_t)(x)) << SCT_EVEN_IEN0_SHIFT)) & SCT_EVEN_IEN0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h41412 #define SCT_EVEN_IEN0_MASK (0x1U) macro
41418 … (((uint32_t)(((uint32_t)(x)) << SCT_EVEN_IEN0_SHIFT)) & SCT_EVEN_IEN0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S36/
DLPC55S36.h44414 #define SCT_EVEN_IEN0_MASK (0x1U) macro
44420 … (((uint32_t)(((uint32_t)(x)) << SCT_EVEN_IEN0_SHIFT)) & SCT_EVEN_IEN0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h47815 #define SCT_EVEN_IEN0_MASK (0x1U) macro
47821 … (((uint32_t)(((uint32_t)(x)) << SCT_EVEN_IEN0_SHIFT)) & SCT_EVEN_IEN0_MASK)
DMIMXRT758S_hifi1.h47753 #define SCT_EVEN_IEN0_MASK (0x1U) macro
47759 … (((uint32_t)(((uint32_t)(x)) << SCT_EVEN_IEN0_SHIFT)) & SCT_EVEN_IEN0_MASK)
DMIMXRT758S_cm33_core0.h65695 #define SCT_EVEN_IEN0_MASK (0x1U) macro
65701 … (((uint32_t)(((uint32_t)(x)) << SCT_EVEN_IEN0_SHIFT)) & SCT_EVEN_IEN0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h47753 #define SCT_EVEN_IEN0_MASK (0x1U) macro
47759 … (((uint32_t)(((uint32_t)(x)) << SCT_EVEN_IEN0_SHIFT)) & SCT_EVEN_IEN0_MASK)
DMIMXRT798S_cm33_core1.h47815 #define SCT_EVEN_IEN0_MASK (0x1U) macro
47821 … (((uint32_t)(((uint32_t)(x)) << SCT_EVEN_IEN0_SHIFT)) & SCT_EVEN_IEN0_MASK)
DMIMXRT798S_hifi4.h65610 #define SCT_EVEN_IEN0_MASK (0x1U) macro
65616 … (((uint32_t)(((uint32_t)(x)) << SCT_EVEN_IEN0_SHIFT)) & SCT_EVEN_IEN0_MASK)
DMIMXRT798S_cm33_core0.h65695 #define SCT_EVEN_IEN0_MASK (0x1U) macro
65701 … (((uint32_t)(((uint32_t)(x)) << SCT_EVEN_IEN0_SHIFT)) & SCT_EVEN_IEN0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h67039 #define SCT_EVEN_IEN0_MASK (0x1U) macro
67045 … (((uint32_t)(((uint32_t)(x)) << SCT_EVEN_IEN0_SHIFT)) & SCT_EVEN_IEN0_MASK)
DMCXN546_cm33_core1.h67039 #define SCT_EVEN_IEN0_MASK (0x1U) macro
67045 … (((uint32_t)(((uint32_t)(x)) << SCT_EVEN_IEN0_SHIFT)) & SCT_EVEN_IEN0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h67039 #define SCT_EVEN_IEN0_MASK (0x1U) macro
67045 … (((uint32_t)(((uint32_t)(x)) << SCT_EVEN_IEN0_SHIFT)) & SCT_EVEN_IEN0_MASK)
DMCXN547_cm33_core1.h67039 #define SCT_EVEN_IEN0_MASK (0x1U) macro
67045 … (((uint32_t)(((uint32_t)(x)) << SCT_EVEN_IEN0_SHIFT)) & SCT_EVEN_IEN0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h67786 #define SCT_EVEN_IEN0_MASK (0x1U) macro
67792 … (((uint32_t)(((uint32_t)(x)) << SCT_EVEN_IEN0_SHIFT)) & SCT_EVEN_IEN0_MASK)
DMCXN947_cm33_core0.h67786 #define SCT_EVEN_IEN0_MASK (0x1U) macro
67792 … (((uint32_t)(((uint32_t)(x)) << SCT_EVEN_IEN0_SHIFT)) & SCT_EVEN_IEN0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h67786 #define SCT_EVEN_IEN0_MASK (0x1U) macro
67792 … (((uint32_t)(((uint32_t)(x)) << SCT_EVEN_IEN0_SHIFT)) & SCT_EVEN_IEN0_MASK)
DMCXN946_cm33_core1.h67786 #define SCT_EVEN_IEN0_MASK (0x1U) macro
67792 … (((uint32_t)(((uint32_t)(x)) << SCT_EVEN_IEN0_SHIFT)) & SCT_EVEN_IEN0_MASK)

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