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Searched refs:SCT_CONEN_NCEN1_MASK (Results 1 – 25 of 29) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h38985 #define SCT_CONEN_NCEN1_MASK (0x2U) macro
38991 … (((uint32_t)(((uint32_t)(x)) << SCT_CONEN_NCEN1_SHIFT)) & SCT_CONEN_NCEN1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h38985 #define SCT_CONEN_NCEN1_MASK (0x2U) macro
38991 … (((uint32_t)(((uint32_t)(x)) << SCT_CONEN_NCEN1_SHIFT)) & SCT_CONEN_NCEN1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h40058 #define SCT_CONEN_NCEN1_MASK (0x2U) macro
40064 … (((uint32_t)(((uint32_t)(x)) << SCT_CONEN_NCEN1_SHIFT)) & SCT_CONEN_NCEN1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_cm33.h41685 #define SCT_CONEN_NCEN1_MASK (0x2U) macro
41691 … (((uint32_t)(((uint32_t)(x)) << SCT_CONEN_NCEN1_SHIFT)) & SCT_CONEN_NCEN1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h44804 #define SCT_CONEN_NCEN1_MASK (0x2U) macro
44810 … (((uint32_t)(((uint32_t)(x)) << SCT_CONEN_NCEN1_SHIFT)) & SCT_CONEN_NCEN1_MASK)
DMIMXRT735S_cm33_core1.h44864 #define SCT_CONEN_NCEN1_MASK (0x2U) macro
44870 … (((uint32_t)(((uint32_t)(x)) << SCT_CONEN_NCEN1_SHIFT)) & SCT_CONEN_NCEN1_MASK)
DMIMXRT735S_ezhv.h63058 #define SCT_CONEN_NCEN1_MASK (0x2U) macro
63064 … (((uint32_t)(((uint32_t)(x)) << SCT_CONEN_NCEN1_SHIFT)) & SCT_CONEN_NCEN1_MASK)
DMIMXRT735S_cm33_core0.h62742 #define SCT_CONEN_NCEN1_MASK (0x2U) macro
62748 … (((uint32_t)(((uint32_t)(x)) << SCT_CONEN_NCEN1_SHIFT)) & SCT_CONEN_NCEN1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h41684 #define SCT_CONEN_NCEN1_MASK (0x2U) macro
41690 … (((uint32_t)(((uint32_t)(x)) << SCT_CONEN_NCEN1_SHIFT)) & SCT_CONEN_NCEN1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S36/
DLPC55S36.h44686 #define SCT_CONEN_NCEN1_MASK (0x2U) macro
44692 … (((uint32_t)(((uint32_t)(x)) << SCT_CONEN_NCEN1_SHIFT)) & SCT_CONEN_NCEN1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h48087 #define SCT_CONEN_NCEN1_MASK (0x2U) macro
48093 … (((uint32_t)(((uint32_t)(x)) << SCT_CONEN_NCEN1_SHIFT)) & SCT_CONEN_NCEN1_MASK)
DMIMXRT758S_hifi1.h48025 #define SCT_CONEN_NCEN1_MASK (0x2U) macro
48031 … (((uint32_t)(((uint32_t)(x)) << SCT_CONEN_NCEN1_SHIFT)) & SCT_CONEN_NCEN1_MASK)
DMIMXRT758S_cm33_core0.h65967 #define SCT_CONEN_NCEN1_MASK (0x2U) macro
65973 … (((uint32_t)(((uint32_t)(x)) << SCT_CONEN_NCEN1_SHIFT)) & SCT_CONEN_NCEN1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h48025 #define SCT_CONEN_NCEN1_MASK (0x2U) macro
48031 … (((uint32_t)(((uint32_t)(x)) << SCT_CONEN_NCEN1_SHIFT)) & SCT_CONEN_NCEN1_MASK)
DMIMXRT798S_cm33_core1.h48087 #define SCT_CONEN_NCEN1_MASK (0x2U) macro
48093 … (((uint32_t)(((uint32_t)(x)) << SCT_CONEN_NCEN1_SHIFT)) & SCT_CONEN_NCEN1_MASK)
DMIMXRT798S_hifi4.h65882 #define SCT_CONEN_NCEN1_MASK (0x2U) macro
65888 … (((uint32_t)(((uint32_t)(x)) << SCT_CONEN_NCEN1_SHIFT)) & SCT_CONEN_NCEN1_MASK)
DMIMXRT798S_cm33_core0.h65967 #define SCT_CONEN_NCEN1_MASK (0x2U) macro
65973 … (((uint32_t)(((uint32_t)(x)) << SCT_CONEN_NCEN1_SHIFT)) & SCT_CONEN_NCEN1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h67311 #define SCT_CONEN_NCEN1_MASK (0x2U) macro
67317 … (((uint32_t)(((uint32_t)(x)) << SCT_CONEN_NCEN1_SHIFT)) & SCT_CONEN_NCEN1_MASK)
DMCXN546_cm33_core1.h67311 #define SCT_CONEN_NCEN1_MASK (0x2U) macro
67317 … (((uint32_t)(((uint32_t)(x)) << SCT_CONEN_NCEN1_SHIFT)) & SCT_CONEN_NCEN1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h67311 #define SCT_CONEN_NCEN1_MASK (0x2U) macro
67317 … (((uint32_t)(((uint32_t)(x)) << SCT_CONEN_NCEN1_SHIFT)) & SCT_CONEN_NCEN1_MASK)
DMCXN547_cm33_core1.h67311 #define SCT_CONEN_NCEN1_MASK (0x2U) macro
67317 … (((uint32_t)(((uint32_t)(x)) << SCT_CONEN_NCEN1_SHIFT)) & SCT_CONEN_NCEN1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h68058 #define SCT_CONEN_NCEN1_MASK (0x2U) macro
68064 … (((uint32_t)(((uint32_t)(x)) << SCT_CONEN_NCEN1_SHIFT)) & SCT_CONEN_NCEN1_MASK)
DMCXN947_cm33_core0.h68058 #define SCT_CONEN_NCEN1_MASK (0x2U) macro
68064 … (((uint32_t)(((uint32_t)(x)) << SCT_CONEN_NCEN1_SHIFT)) & SCT_CONEN_NCEN1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h68058 #define SCT_CONEN_NCEN1_MASK (0x2U) macro
68064 … (((uint32_t)(((uint32_t)(x)) << SCT_CONEN_NCEN1_SHIFT)) & SCT_CONEN_NCEN1_MASK)
DMCXN946_cm33_core1.h68058 #define SCT_CONEN_NCEN1_MASK (0x2U) macro
68064 … (((uint32_t)(((uint32_t)(x)) << SCT_CONEN_NCEN1_SHIFT)) & SCT_CONEN_NCEN1_MASK)

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