/hal_nxp-latest/mcux/mcux-sdk/drivers/qtmr_2/ |
D | fsl_qtmr.c | 80 …base->SCTRL = (TMR_SCTRL_EEOF(config->enableExternalForce) | TMR_SCTRL_MSTR(config->enableMasterMo… in QTMR_Init() 169 base->SCTRL |= (TMR_SCTRL_FORCE_MASK | TMR_SCTRL_OEN_MASK); in QTMR_SetupPwm() 195 base->SCTRL |= TMR_SCTRL_OPS_MASK; in QTMR_SetupPwm() 200 base->SCTRL &= ~(uint16_t)TMR_SCTRL_OPS_MASK; in QTMR_SetupPwm() 247 reg = base->SCTRL & in QTMR_SetupInputCapture() 251 base->SCTRL = reg; in QTMR_SetupInputCapture() 275 reg = base->SCTRL; in QTMR_EnableInterrupts() 291 base->SCTRL = reg; in QTMR_EnableInterrupts() 318 reg = base->SCTRL; in QTMR_DisableInterrupts() 334 base->SCTRL = reg; in QTMR_DisableInterrupts() [all …]
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/hal_nxp-latest/mcux/mcux-sdk/drivers/qtmr_1/ |
D | fsl_qtmr.c | 83 base->CHANNEL[channel].SCTRL = in QTMR_Init() 181 base->CHANNEL[channel].SCTRL |= (TMR_SCTRL_FORCE_MASK | TMR_SCTRL_OEN_MASK); in QTMR_SetupPwm() 222 base->CHANNEL[channel].SCTRL |= TMR_SCTRL_OPS_MASK; in QTMR_SetupPwm() 227 base->CHANNEL[channel].SCTRL &= ~(uint16_t)TMR_SCTRL_OPS_MASK; in QTMR_SetupPwm() 293 reg = base->CHANNEL[channel].SCTRL & in QTMR_SetupInputCapture() 297 base->CHANNEL[channel].SCTRL = reg; in QTMR_SetupInputCapture() 322 reg = base->CHANNEL[channel].SCTRL; in QTMR_EnableInterrupts() 340 base->CHANNEL[channel].SCTRL = reg; in QTMR_EnableInterrupts() 368 reg = base->CHANNEL[channel].SCTRL; in QTMR_DisableInterrupts() 384 base->CHANNEL[channel].SCTRL = reg; in QTMR_DisableInterrupts() [all …]
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/hal_nxp-latest/s32/drivers/s32k3/Mcl/src/ |
D | Lcu_Ip_Hw_Access.c | 161 uint32 Reg = PtBase->LC[LcId].SCTRL; in HwAcc_Lcu_AsyncSetInputSwSyncMode() 168 PtBase->LC[LcId].SCTRL = Reg; in HwAcc_Lcu_AsyncSetInputSwSyncMode() 449 uint32 Reg = PtBase->LC[LcId].SCTRL; in HwAcc_Lcu_SetSwSyncSelect() 454 PtBase->LC[LcId].SCTRL = Reg; in HwAcc_Lcu_SetSwSyncSelect()
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/hal_nxp-latest/mcux/mcux-sdk/drivers/i3c/ |
D | fsl_i3c.c | 2923 uint32_t ctrlValue = base->SCTRL; in I3C_SlaveRequestEvent() 2928 base->SCTRL = ctrlValue; in I3C_SlaveRequestEvent() 2941 uint32_t ctrlValue = base->SCTRL; in I3C_SlaveRequestIBIWithSingleData() 2946 base->SCTRL = ctrlValue; in I3C_SlaveRequestIBIWithSingleData() 2997 ctrlValue = base->SCTRL; in I3C_SlaveRequestIBIWithData() 3005 base->SCTRL = ctrlValue; in I3C_SlaveRequestIBIWithData()
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/hal_nxp-latest/mcux/mcux-sdk/drivers/hsadc/ |
D | fsl_hsadc.c | 888 base->SCTRL |= ((uint16_t)1U << sampleIndex); in HSADC_SetSampleConfig() 892 base->SCTRL &= ~((uint16_t)1U << sampleIndex); in HSADC_SetSampleConfig()
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/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/ |
D | S32Z2_LCU.h | 87 …__IO uint32_t SCTRL; /**< LC 0 Sync Control..LC 2 Sync Control, array … member
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/hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/ |
D | S32K344_LCU.h | 87 …__IO uint32_t SCTRL; /**< LC 0 Sync Control..LC 2 Sync Control, array … member
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/hal_nxp-latest/mcux/mcux-sdk/devices/LPC864/ |
D | LPC864.h | 4661 __IO uint32_t SCTRL; /**< Target Control Register, offset: 0xC */ member
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/hal_nxp-latest/mcux/mcux-sdk/devices/LPC865/ |
D | LPC865.h | 4663 __IO uint32_t SCTRL; /**< Target Control Register, offset: 0xC */ member
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/hal_nxp-latest/mcux/mcux-sdk/devices/MKM14ZA5/ |
D | MKM14ZA5.h | 11699 …__IO uint16_t SCTRL; /**< Timer Channel Status and Control Register, o… member
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/hal_nxp-latest/mcux/mcux-sdk/devices/MKM33ZA5/ |
D | MKM33ZA5.h | 16404 …__IO uint16_t SCTRL; /**< Timer Channel Status and Control Register, o… member
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/hal_nxp-latest/mcux/mcux-sdk/devices/MKM34ZA5/ |
D | MKM34ZA5.h | 16400 …__IO uint16_t SCTRL; /**< Timer Channel Status and Control Register, o… member
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/hal_nxp-latest/mcux/mcux-sdk/devices/MKM35Z7/ |
D | MKM35Z7.h | 17857 …__IO uint16_t SCTRL; /**< Timer Channel Status and Control Register, o… member
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/hal_nxp-latest/mcux/mcux-sdk/devices/MKM34Z7/ |
D | MKM34Z7.h | 17986 __IO uint16_t SCTRL; /**< Timer Channel Status and Control Register, offset: 0xE */ member
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/hal_nxp-latest/mcux/mcux-sdk/devices/MKV56F24/ |
D | MKV56F24.h | 14642 __IO uint16_t SCTRL; /**< HSADC Scan Control Register, offset: 0xA4 */ member
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/hal_nxp-latest/mcux/mcux-sdk/devices/MKV58F24/ |
D | MKV58F24.h | 16408 __IO uint16_t SCTRL; /**< HSADC Scan Control Register, offset: 0xA4 */ member
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/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/ |
D | MCXA142.h | 12260 __IO uint32_t SCTRL; /**< Target Control, offset: 0xC */ member
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/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/ |
D | MCXA143.h | 12260 __IO uint32_t SCTRL; /**< Target Control, offset: 0xC */ member
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/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/ |
D | MCXA153.h | 12260 __IO uint32_t SCTRL; /**< Target Control, offset: 0xC */ member
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/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/ |
D | MCXA152.h | 12260 __IO uint32_t SCTRL; /**< Target Control, offset: 0xC */ member
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/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/ |
D | MCXA146.h | 15319 __IO uint32_t SCTRL; /**< Target Control, offset: 0xC */ member
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/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/ |
D | MCXA144.h | 15319 __IO uint32_t SCTRL; /**< Target Control, offset: 0xC */ member
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/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/ |
D | MCXA145.h | 15319 __IO uint32_t SCTRL; /**< Target Control, offset: 0xC */ member
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/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/ |
D | MCXA156.h | 15323 __IO uint32_t SCTRL; /**< Target Control, offset: 0xC */ member
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/ |
D | MIMXRT685S_dsp.h | 10215 __IO uint32_t SCTRL; /**< Slave Control Register, offset: 0xC */ member
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