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Searched refs:SCTRL (Results 1 – 25 of 91) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/qtmr_2/
Dfsl_qtmr.c80 …base->SCTRL = (TMR_SCTRL_EEOF(config->enableExternalForce) | TMR_SCTRL_MSTR(config->enableMasterMo… in QTMR_Init()
169 base->SCTRL |= (TMR_SCTRL_FORCE_MASK | TMR_SCTRL_OEN_MASK); in QTMR_SetupPwm()
195 base->SCTRL |= TMR_SCTRL_OPS_MASK; in QTMR_SetupPwm()
200 base->SCTRL &= ~(uint16_t)TMR_SCTRL_OPS_MASK; in QTMR_SetupPwm()
247 reg = base->SCTRL & in QTMR_SetupInputCapture()
251 base->SCTRL = reg; in QTMR_SetupInputCapture()
275 reg = base->SCTRL; in QTMR_EnableInterrupts()
291 base->SCTRL = reg; in QTMR_EnableInterrupts()
318 reg = base->SCTRL; in QTMR_DisableInterrupts()
334 base->SCTRL = reg; in QTMR_DisableInterrupts()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/drivers/qtmr_1/
Dfsl_qtmr.c83 base->CHANNEL[channel].SCTRL = in QTMR_Init()
181 base->CHANNEL[channel].SCTRL |= (TMR_SCTRL_FORCE_MASK | TMR_SCTRL_OEN_MASK); in QTMR_SetupPwm()
222 base->CHANNEL[channel].SCTRL |= TMR_SCTRL_OPS_MASK; in QTMR_SetupPwm()
227 base->CHANNEL[channel].SCTRL &= ~(uint16_t)TMR_SCTRL_OPS_MASK; in QTMR_SetupPwm()
293 reg = base->CHANNEL[channel].SCTRL & in QTMR_SetupInputCapture()
297 base->CHANNEL[channel].SCTRL = reg; in QTMR_SetupInputCapture()
322 reg = base->CHANNEL[channel].SCTRL; in QTMR_EnableInterrupts()
340 base->CHANNEL[channel].SCTRL = reg; in QTMR_EnableInterrupts()
368 reg = base->CHANNEL[channel].SCTRL; in QTMR_DisableInterrupts()
384 base->CHANNEL[channel].SCTRL = reg; in QTMR_DisableInterrupts()
[all …]
/hal_nxp-latest/s32/drivers/s32k3/Mcl/src/
DLcu_Ip_Hw_Access.c161 uint32 Reg = PtBase->LC[LcId].SCTRL; in HwAcc_Lcu_AsyncSetInputSwSyncMode()
168 PtBase->LC[LcId].SCTRL = Reg; in HwAcc_Lcu_AsyncSetInputSwSyncMode()
449 uint32 Reg = PtBase->LC[LcId].SCTRL; in HwAcc_Lcu_SetSwSyncSelect()
454 PtBase->LC[LcId].SCTRL = Reg; in HwAcc_Lcu_SetSwSyncSelect()
/hal_nxp-latest/mcux/mcux-sdk/drivers/i3c/
Dfsl_i3c.c2923 uint32_t ctrlValue = base->SCTRL; in I3C_SlaveRequestEvent()
2928 base->SCTRL = ctrlValue; in I3C_SlaveRequestEvent()
2941 uint32_t ctrlValue = base->SCTRL; in I3C_SlaveRequestIBIWithSingleData()
2946 base->SCTRL = ctrlValue; in I3C_SlaveRequestIBIWithSingleData()
2997 ctrlValue = base->SCTRL; in I3C_SlaveRequestIBIWithData()
3005 base->SCTRL = ctrlValue; in I3C_SlaveRequestIBIWithData()
/hal_nxp-latest/mcux/mcux-sdk/drivers/hsadc/
Dfsl_hsadc.c888 base->SCTRL |= ((uint16_t)1U << sampleIndex); in HSADC_SetSampleConfig()
892 base->SCTRL &= ~((uint16_t)1U << sampleIndex); in HSADC_SetSampleConfig()
/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_LCU.h87 …__IO uint32_t SCTRL; /**< LC 0 Sync Control..LC 2 Sync Control, array … member
/hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/
DS32K344_LCU.h87 …__IO uint32_t SCTRL; /**< LC 0 Sync Control..LC 2 Sync Control, array … member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC864/
DLPC864.h4661 __IO uint32_t SCTRL; /**< Target Control Register, offset: 0xC */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC865/
DLPC865.h4663 __IO uint32_t SCTRL; /**< Target Control Register, offset: 0xC */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM14ZA5/
DMKM14ZA5.h11699 …__IO uint16_t SCTRL; /**< Timer Channel Status and Control Register, o… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM33ZA5/
DMKM33ZA5.h16404 …__IO uint16_t SCTRL; /**< Timer Channel Status and Control Register, o… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM34ZA5/
DMKM34ZA5.h16400 …__IO uint16_t SCTRL; /**< Timer Channel Status and Control Register, o… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM35Z7/
DMKM35Z7.h17857 …__IO uint16_t SCTRL; /**< Timer Channel Status and Control Register, o… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM34Z7/
DMKM34Z7.h17986 __IO uint16_t SCTRL; /**< Timer Channel Status and Control Register, offset: 0xE */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV56F24/
DMKV56F24.h14642 __IO uint16_t SCTRL; /**< HSADC Scan Control Register, offset: 0xA4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV58F24/
DMKV58F24.h16408 __IO uint16_t SCTRL; /**< HSADC Scan Control Register, offset: 0xA4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/
DMCXA142.h12260 __IO uint32_t SCTRL; /**< Target Control, offset: 0xC */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/
DMCXA143.h12260 __IO uint32_t SCTRL; /**< Target Control, offset: 0xC */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/
DMCXA153.h12260 __IO uint32_t SCTRL; /**< Target Control, offset: 0xC */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/
DMCXA152.h12260 __IO uint32_t SCTRL; /**< Target Control, offset: 0xC */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h15319 __IO uint32_t SCTRL; /**< Target Control, offset: 0xC */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h15319 __IO uint32_t SCTRL; /**< Target Control, offset: 0xC */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h15319 __IO uint32_t SCTRL; /**< Target Control, offset: 0xC */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/
DMCXA156.h15323 __IO uint32_t SCTRL; /**< Target Control, offset: 0xC */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h10215 __IO uint32_t SCTRL; /**< Slave Control Register, offset: 0xC */ member

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