Home
last modified time | relevance | path

Searched refs:SCG_SPLLCSR_SPLLCM_MASK (Results 1 – 25 of 39) sorted by relevance

12

/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/drivers/
Dfsl_clock.h603 …kSCG_SysPllMonitorInt = SCG_SPLLCSR_SPLLCM_MASK, /*!< Interrupt when the system PLL error is d…
605 …SCG_SPLLCSR_SPLLCM_MASK | SCG_SPLLCSR_SPLLCMRE_MASK /*!< Reset when the system PLL error is detect…
1325 reg &= ~(SCG_SPLLCSR_SPLLCM_MASK | SCG_SPLLCSR_SPLLCMRE_MASK); in CLOCK_SetSysPllMonitorMode()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/drivers/
Dfsl_clock.h603 …kSCG_SysPllMonitorInt = SCG_SPLLCSR_SPLLCM_MASK, /*!< Interrupt when the system PLL error is d…
605 …SCG_SPLLCSR_SPLLCM_MASK | SCG_SPLLCSR_SPLLCMRE_MASK /*!< Reset when the system PLL error is detect…
1325 reg &= ~(SCG_SPLLCSR_SPLLCM_MASK | SCG_SPLLCSR_SPLLCMRE_MASK); in CLOCK_SetSysPllMonitorMode()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/drivers/
Dfsl_clock.h597 …kSCG_SysPllMonitorInt = SCG_SPLLCSR_SPLLCM_MASK, /*!< Interrupt when the system PLL error is d…
599 …SCG_SPLLCSR_SPLLCM_MASK | SCG_SPLLCSR_SPLLCMRE_MASK /*!< Reset when the system PLL error is detect…
1319 reg &= ~(SCG_SPLLCSR_SPLLCM_MASK | SCG_SPLLCSR_SPLLCMRE_MASK); in CLOCK_SetSysPllMonitorMode()
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A41A/drivers/
Dfsl_clock.h601 …kSCG_SysPllMonitorInt = SCG_SPLLCSR_SPLLCM_MASK, /*!< Interrupt when the system PLL error is d…
603 …SCG_SPLLCSR_SPLLCM_MASK | SCG_SPLLCSR_SPLLCMRE_MASK /*!< Reset when the system PLL error is detect…
1389 reg &= ~(SCG_SPLLCSR_SPLLCM_MASK | SCG_SPLLCSR_SPLLCMRE_MASK); in CLOCK_SetSysPllMonitorMode()
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A31A/drivers/
Dfsl_clock.h601 …kSCG_SysPllMonitorInt = SCG_SPLLCSR_SPLLCM_MASK, /*!< Interrupt when the system PLL error is d…
603 …SCG_SPLLCSR_SPLLCM_MASK | SCG_SPLLCSR_SPLLCMRE_MASK /*!< Reset when the system PLL error is detect…
1389 reg &= ~(SCG_SPLLCSR_SPLLCM_MASK | SCG_SPLLCSR_SPLLCMRE_MASK); in CLOCK_SetSysPllMonitorMode()
/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K142W_SCG.h414 #define SCG_SPLLCSR_SPLLCM_MASK (0x10000U) macro
417 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_SPLLCM_SHIFT)) & SCG_SPLLCSR_SPLLCM_MASK)
DS32K142_SCG.h438 #define SCG_SPLLCSR_SPLLCM_MASK (0x10000U) macro
441 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_SPLLCM_SHIFT)) & SCG_SPLLCSR_SPLLCM_MASK)
DS32K146_SCG.h438 #define SCG_SPLLCSR_SPLLCM_MASK (0x10000U) macro
441 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_SPLLCM_SHIFT)) & SCG_SPLLCSR_SPLLCM_MASK)
DS32K144_SCG.h438 #define SCG_SPLLCSR_SPLLCM_MASK (0x10000U) macro
441 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_SPLLCM_SHIFT)) & SCG_SPLLCSR_SPLLCM_MASK)
DS32K148_SCG.h438 #define SCG_SPLLCSR_SPLLCM_MASK (0x10000U) macro
441 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_SPLLCM_SHIFT)) & SCG_SPLLCSR_SPLLCM_MASK)
DS32K144W_SCG.h414 #define SCG_SPLLCSR_SPLLCM_MASK (0x10000U) macro
417 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_SPLLCM_SHIFT)) & SCG_SPLLCSR_SPLLCM_MASK)
/hal_nxp-latest/s32/drivers/s32k1/Mcu/src/
DClock_Ip_Pll.c262 IP_SCG->SPLLCSR &= (~((uint32)SCG_SPLLCSR_SPLLCM_MASK)); in Clock_Ip_ResetSpll_TrustedCall()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/drivers/
Dfsl_clock.h1037 …kSCG_Pll1MonitorInt = SCG_SPLLCSR_SPLLCM_MASK, /*!< Interrupt when the PLL1 Clock error i…
1039 …SCG_SPLLCSR_SPLLCM_MASK | SCG_SPLLCSR_SPLLCMRE_MASK /*!< Reset when the PLL1 Clock error is detect…
Dfsl_clock.c508 reg &= ~(SCG_SPLLCSR_SPLLCM_MASK | SCG_SPLLCSR_SPLLCMRE_MASK); in CLOCK_SetPll1MonitorMode()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/drivers/
Dfsl_clock.h1037 …kSCG_Pll1MonitorInt = SCG_SPLLCSR_SPLLCM_MASK, /*!< Interrupt when the PLL1 Clock error i…
1039 …SCG_SPLLCSR_SPLLCM_MASK | SCG_SPLLCSR_SPLLCMRE_MASK /*!< Reset when the PLL1 Clock error is detect…
Dfsl_clock.c508 reg &= ~(SCG_SPLLCSR_SPLLCM_MASK | SCG_SPLLCSR_SPLLCMRE_MASK); in CLOCK_SetPll1MonitorMode()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/drivers/
Dfsl_clock.h1291 …kSCG_Pll1MonitorInt = SCG_SPLLCSR_SPLLCM_MASK, /*!< Interrupt when the PLL1 Clock error i…
1293 …SCG_SPLLCSR_SPLLCM_MASK | SCG_SPLLCSR_SPLLCMRE_MASK /*!< Reset when the PLL1 Clock error is detect…
Dfsl_clock.c524 reg &= ~(SCG_SPLLCSR_SPLLCM_MASK | SCG_SPLLCSR_SPLLCMRE_MASK); in CLOCK_SetPll1MonitorMode()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/drivers/
Dfsl_clock.h1291 …kSCG_Pll1MonitorInt = SCG_SPLLCSR_SPLLCM_MASK, /*!< Interrupt when the PLL1 Clock error i…
1293 …SCG_SPLLCSR_SPLLCM_MASK | SCG_SPLLCSR_SPLLCMRE_MASK /*!< Reset when the PLL1 Clock error is detect…
Dfsl_clock.c524 reg &= ~(SCG_SPLLCSR_SPLLCM_MASK | SCG_SPLLCSR_SPLLCMRE_MASK); in CLOCK_SetPll1MonitorMode()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/drivers/
Dfsl_clock.h1291 …kSCG_Pll1MonitorInt = SCG_SPLLCSR_SPLLCM_MASK, /*!< Interrupt when the PLL1 Clock error i…
1293 …SCG_SPLLCSR_SPLLCM_MASK | SCG_SPLLCSR_SPLLCMRE_MASK /*!< Reset when the PLL1 Clock error is detect…
Dfsl_clock.c524 reg &= ~(SCG_SPLLCSR_SPLLCM_MASK | SCG_SPLLCSR_SPLLCMRE_MASK); in CLOCK_SetPll1MonitorMode()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/drivers/
Dfsl_clock.h1291 …kSCG_Pll1MonitorInt = SCG_SPLLCSR_SPLLCM_MASK, /*!< Interrupt when the PLL1 Clock error i…
1293 …SCG_SPLLCSR_SPLLCM_MASK | SCG_SPLLCSR_SPLLCMRE_MASK /*!< Reset when the PLL1 Clock error is detect…
Dfsl_clock.c524 reg &= ~(SCG_SPLLCSR_SPLLCM_MASK | SCG_SPLLCSR_SPLLCMRE_MASK); in CLOCK_SetPll1MonitorMode()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h16166 #define SCG_SPLLCSR_SPLLCM_MASK (0x10000U) macro
16172 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_SPLLCM_SHIFT)) & SCG_SPLLCSR_SPLLCM_MASK)

12