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Searched refs:SCG_SPLLCSR_LK_MASK (Results 1 – 25 of 31) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k1/Mcu/src/
DClock_Ip_Pll.c259 IP_SCG->SPLLCSR &= (~((uint32)SCG_SPLLCSR_LK_MASK)); in Clock_Ip_ResetSpll_TrustedCall()
339 IP_SCG->SPLLCSR &= (~((uint32)SCG_SPLLCSR_LK_MASK)); in Clock_Ip_DisableSpll_TrustedCall()
/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K142W_SCG.h424 #define SCG_SPLLCSR_LK_MASK (0x800000U) macro
427 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_LK_SHIFT)) & SCG_SPLLCSR_LK_MASK)
DS32K142_SCG.h448 #define SCG_SPLLCSR_LK_MASK (0x800000U) macro
451 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_LK_SHIFT)) & SCG_SPLLCSR_LK_MASK)
DS32K146_SCG.h448 #define SCG_SPLLCSR_LK_MASK (0x800000U) macro
451 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_LK_SHIFT)) & SCG_SPLLCSR_LK_MASK)
DS32K144_SCG.h448 #define SCG_SPLLCSR_LK_MASK (0x800000U) macro
451 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_LK_SHIFT)) & SCG_SPLLCSR_LK_MASK)
DS32K148_SCG.h448 #define SCG_SPLLCSR_LK_MASK (0x800000U) macro
451 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_LK_SHIFT)) & SCG_SPLLCSR_LK_MASK)
DS32K144W_SCG.h424 #define SCG_SPLLCSR_LK_MASK (0x800000U) macro
427 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_LK_SHIFT)) & SCG_SPLLCSR_LK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/drivers/
Dfsl_clock.c1076 else if ((reg & SCG_SPLLCSR_LK_MASK) != 0UL) in CLOCK_DeinitSysPll()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/drivers/
Dfsl_clock.c1076 else if ((reg & SCG_SPLLCSR_LK_MASK) != 0UL) in CLOCK_DeinitSysPll()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/drivers/
Dfsl_clock.c1076 else if ((reg & SCG_SPLLCSR_LK_MASK) != 0UL) in CLOCK_DeinitSysPll()
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A41A/drivers/
Dfsl_clock.c1116 else if ((reg & SCG_SPLLCSR_LK_MASK) != 0UL) in CLOCK_DeinitSysPll()
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A31A/drivers/
Dfsl_clock.c1116 else if ((reg & SCG_SPLLCSR_LK_MASK) != 0UL) in CLOCK_DeinitSysPll()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/drivers/
Dfsl_clock.c1466 else if ((reg & SCG_SPLLCSR_LK_MASK) != 0UL) in CLOCK_DeinitSysPll()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/drivers/
Dfsl_clock.c1466 else if ((reg & SCG_SPLLCSR_LK_MASK) != 0UL) in CLOCK_DeinitSysPll()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h16182 #define SCG_SPLLCSR_LK_MASK (0x800000U) macro
16188 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_LK_SHIFT)) & SCG_SPLLCSR_LK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A41A/
DK32L2A41A.h15204 #define SCG_SPLLCSR_LK_MASK (0x800000U) macro
15210 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_LK_SHIFT)) & SCG_SPLLCSR_LK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A31A/
DK32L2A31A.h15204 #define SCG_SPLLCSR_LK_MASK (0x800000U) macro
15210 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_LK_SHIFT)) & SCG_SPLLCSR_LK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h17188 #define SCG_SPLLCSR_LK_MASK (0x800000U) macro
17194 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_LK_SHIFT)) & SCG_SPLLCSR_LK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h17182 #define SCG_SPLLCSR_LK_MASK (0x800000U) macro
17188 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_LK_SHIFT)) & SCG_SPLLCSR_LK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h29853 #define SCG_SPLLCSR_LK_MASK (0x800000U) macro
29859 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_LK_SHIFT)) & SCG_SPLLCSR_LK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h29854 #define SCG_SPLLCSR_LK_MASK (0x800000U) macro
29860 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_LK_SHIFT)) & SCG_SPLLCSR_LK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h53517 #define SCG_SPLLCSR_LK_MASK (0x800000U) macro
53523 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_LK_SHIFT)) & SCG_SPLLCSR_LK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h53475 #define SCG_SPLLCSR_LK_MASK (0x800000U) macro
53481 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_LK_SHIFT)) & SCG_SPLLCSR_LK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h65052 #define SCG_SPLLCSR_LK_MASK (0x800000U) macro
65058 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_LK_SHIFT)) & SCG_SPLLCSR_LK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h65052 #define SCG_SPLLCSR_LK_MASK (0x800000U) macro
65058 … (((uint32_t)(((uint32_t)(x)) << SCG_SPLLCSR_LK_SHIFT)) & SCG_SPLLCSR_LK_MASK)

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