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Searched refs:SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK (Results 1 – 25 of 36) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/drivers/
Dfsl_clock.c159 SCG0->FIRCCSR |= SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK; in CLOCK_SetupFROHFClocking()
1887 return ((SCG0->FIRCCSR & SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK) != 0U) ? 144000000U : 0U; in CLOCK_GetClk144MFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/drivers/
Dfsl_clock.c159 SCG0->FIRCCSR |= SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK; in CLOCK_SetupFROHFClocking()
1887 return ((SCG0->FIRCCSR & SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK) != 0U) ? 144000000U : 0U; in CLOCK_GetClk144MFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/drivers/
Dfsl_clock.c241 SCG0->FIRCCSR |= SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK; in CLOCK_SetupFROHFClocking()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/drivers/
Dfsl_clock.c241 SCG0->FIRCCSR |= SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK; in CLOCK_SetupFROHFClocking()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/drivers/
Dfsl_clock.c241 SCG0->FIRCCSR |= SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK; in CLOCK_SetupFROHFClocking()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/drivers/
Dfsl_clock.c241 SCG0->FIRCCSR |= SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK; in CLOCK_SetupFROHFClocking()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/drivers/
Dfsl_clock.c161 SCG0->FIRCCSR |= SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK; in CLOCK_SetupFROHFClocking()
2301 return ((SCG0->FIRCCSR & SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK) != 0U) ? 144000000U : 0U; in CLOCK_GetClk144MFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/drivers/
Dfsl_clock.c161 SCG0->FIRCCSR |= SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK; in CLOCK_SetupFROHFClocking()
2301 return ((SCG0->FIRCCSR & SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK) != 0U) ? 144000000U : 0U; in CLOCK_GetClk144MFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/drivers/
Dfsl_clock.c161 SCG0->FIRCCSR |= SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK; in CLOCK_SetupFROHFClocking()
2301 return ((SCG0->FIRCCSR & SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK) != 0U) ? 144000000U : 0U; in CLOCK_GetClk144MFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/drivers/
Dfsl_clock.c161 SCG0->FIRCCSR |= SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK; in CLOCK_SetupFROHFClocking()
2301 return ((SCG0->FIRCCSR & SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK) != 0U) ? 144000000U : 0U; in CLOCK_GetClk144MFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/drivers/
Dfsl_clock.c241 SCG0->FIRCCSR |= SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK; in CLOCK_SetupFROHFClocking()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/drivers/
Dfsl_clock.c241 SCG0->FIRCCSR |= SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK; in CLOCK_SetupFROHFClocking()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/drivers/
Dfsl_clock.c241 SCG0->FIRCCSR |= SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK; in CLOCK_SetupFROHFClocking()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/drivers/
Dfsl_clock.c241 SCG0->FIRCCSR |= SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK; in CLOCK_SetupFROHFClocking()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/drivers/
Dfsl_clock.c241 SCG0->FIRCCSR |= SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK; in CLOCK_SetupFROHFClocking()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/drivers/
Dfsl_clock.c241 SCG0->FIRCCSR |= SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK; in CLOCK_SetupFROHFClocking()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/
DMCXA142.h24977 #define SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK (0x20U) macro
24983 …(((uint32_t)(x)) << SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_SHIFT)) & SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/
DMCXA143.h24977 #define SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK (0x20U) macro
24983 …(((uint32_t)(x)) << SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_SHIFT)) & SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/
DMCXA153.h24977 #define SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK (0x20U) macro
24983 …(((uint32_t)(x)) << SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_SHIFT)) & SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/
DMCXA152.h24977 #define SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK (0x20U) macro
24983 …(((uint32_t)(x)) << SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_SHIFT)) & SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h32245 #define SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK (0x20U) macro
32251 …(((uint32_t)(x)) << SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_SHIFT)) & SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h32245 #define SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK (0x20U) macro
32251 …(((uint32_t)(x)) << SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_SHIFT)) & SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h32245 #define SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK (0x20U) macro
32251 …(((uint32_t)(x)) << SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_SHIFT)) & SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/
DMCXA156.h32867 #define SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK (0x20U) macro
32873 …(((uint32_t)(x)) << SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_SHIFT)) & SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/
DMCXA154.h32867 #define SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK (0x20U) macro
32873 …(((uint32_t)(x)) << SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_SHIFT)) & SCG_FIRCCSR_FIRC_FCLK_PERIPH_EN_MASK)

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