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Searched refs:SAI012FCLKSEL_OFFSET (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/drivers/
Dfsl_clock.h839 #define SAI012FCLKSEL_OFFSET 0x9C8 macro
1098 … CLKCTL0_TUPLE_MUXA(SAI012FCLKSEL_OFFSET, 0), /*!< Attach Compute base clock to SAI012 Clock. */
1099 …kFRO2_DIV8_to_SAI012 = CLKCTL0_TUPLE_MUXA(SAI012FCLKSEL_OFFSET, 1), /*!< Attach FRO2_DIV8 to SAI01…
1100 …kFRO0_DIV1_to_SAI012 = CLKCTL0_TUPLE_MUXA(SAI012FCLKSEL_OFFSET, 2), /*!< Attach FRO0 max clock to …
1102 … CLKCTL0_TUPLE_MUXA(SAI012FCLKSEL_OFFSET, 3), /*!< Attach audio_clk_cmpt clock to SAI012 Clock. */
1103 …kNONE_to_SAI012 = CLKCTL0_TUPLE_MUXA_NONE(SAI012FCLKSEL_OFFSET, 0), /*!< Attach NONE to SAI012 Clo…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/drivers/
Dfsl_clock.h839 #define SAI012FCLKSEL_OFFSET 0x9C8 macro
1098 … CLKCTL0_TUPLE_MUXA(SAI012FCLKSEL_OFFSET, 0), /*!< Attach Compute base clock to SAI012 Clock. */
1099 …kFRO2_DIV8_to_SAI012 = CLKCTL0_TUPLE_MUXA(SAI012FCLKSEL_OFFSET, 1), /*!< Attach FRO2_DIV8 to SAI01…
1100 …kFRO0_DIV1_to_SAI012 = CLKCTL0_TUPLE_MUXA(SAI012FCLKSEL_OFFSET, 2), /*!< Attach FRO0 max clock to …
1102 … CLKCTL0_TUPLE_MUXA(SAI012FCLKSEL_OFFSET, 3), /*!< Attach audio_clk_cmpt clock to SAI012 Clock. */
1103 …kNONE_to_SAI012 = CLKCTL0_TUPLE_MUXA_NONE(SAI012FCLKSEL_OFFSET, 0), /*!< Attach NONE to SAI012 Clo…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/drivers/
Dfsl_clock.h839 #define SAI012FCLKSEL_OFFSET 0x9C8 macro
1098 … CLKCTL0_TUPLE_MUXA(SAI012FCLKSEL_OFFSET, 0), /*!< Attach Compute base clock to SAI012 Clock. */
1099 …kFRO2_DIV8_to_SAI012 = CLKCTL0_TUPLE_MUXA(SAI012FCLKSEL_OFFSET, 1), /*!< Attach FRO2_DIV8 to SAI01…
1100 …kFRO0_DIV1_to_SAI012 = CLKCTL0_TUPLE_MUXA(SAI012FCLKSEL_OFFSET, 2), /*!< Attach FRO0 max clock to …
1102 … CLKCTL0_TUPLE_MUXA(SAI012FCLKSEL_OFFSET, 3), /*!< Attach audio_clk_cmpt clock to SAI012 Clock. */
1103 …kNONE_to_SAI012 = CLKCTL0_TUPLE_MUXA_NONE(SAI012FCLKSEL_OFFSET, 0), /*!< Attach NONE to SAI012 Clo…