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Searched refs:QDC_IMR_FPHA_MASK (Results 1 – 11 of 11) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/drivers/qdc/
Dfsl_qdc.h72 kQDC_FilteredPHAStatusFlag = QDC_IMR_FPHA_MASK, /*!< The filtered version of PHASEA input. */
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h48551 #define QDC_IMR_FPHA_MASK (0x80U) macro
48554 … (((uint16_t)(((uint16_t)(x)) << QDC_IMR_FPHA_SHIFT)) & QDC_IMR_FPHA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h48509 #define QDC_IMR_FPHA_MASK (0x80U) macro
48512 … (((uint16_t)(((uint16_t)(x)) << QDC_IMR_FPHA_SHIFT)) & QDC_IMR_FPHA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h60138 #define QDC_IMR_FPHA_MASK (0x80U) macro
60141 … (((uint16_t)(((uint16_t)(x)) << QDC_IMR_FPHA_SHIFT)) & QDC_IMR_FPHA_MASK)
DMCXN546_cm33_core1.h60138 #define QDC_IMR_FPHA_MASK (0x80U) macro
60141 … (((uint16_t)(((uint16_t)(x)) << QDC_IMR_FPHA_SHIFT)) & QDC_IMR_FPHA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h60138 #define QDC_IMR_FPHA_MASK (0x80U) macro
60141 … (((uint16_t)(((uint16_t)(x)) << QDC_IMR_FPHA_SHIFT)) & QDC_IMR_FPHA_MASK)
DMCXN547_cm33_core1.h60138 #define QDC_IMR_FPHA_MASK (0x80U) macro
60141 … (((uint16_t)(((uint16_t)(x)) << QDC_IMR_FPHA_SHIFT)) & QDC_IMR_FPHA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h60885 #define QDC_IMR_FPHA_MASK (0x80U) macro
60888 … (((uint16_t)(((uint16_t)(x)) << QDC_IMR_FPHA_SHIFT)) & QDC_IMR_FPHA_MASK)
DMCXN947_cm33_core0.h60885 #define QDC_IMR_FPHA_MASK (0x80U) macro
60888 … (((uint16_t)(((uint16_t)(x)) << QDC_IMR_FPHA_SHIFT)) & QDC_IMR_FPHA_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h60885 #define QDC_IMR_FPHA_MASK (0x80U) macro
60888 … (((uint16_t)(((uint16_t)(x)) << QDC_IMR_FPHA_SHIFT)) & QDC_IMR_FPHA_MASK)
DMCXN946_cm33_core1.h60885 #define QDC_IMR_FPHA_MASK (0x80U) macro
60888 … (((uint16_t)(((uint16_t)(x)) << QDC_IMR_FPHA_SHIFT)) & QDC_IMR_FPHA_MASK)