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Searched refs:PUF_SRAM_INT_CLR_STATUS_READY (Results 1 – 11 of 11) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S36/
DLPC55S36.h36464 #define PUF_SRAM_INT_CLR_STATUS_READY(x) (((uint32_t)(((uint32_t)(x)) << PUF_SRAM_INT_CLR_S… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h46327 #define PUF_SRAM_INT_CLR_STATUS_READY(x) (((uint32_t)(((uint32_t)(x)) << PUF_SRAM_INT_CLR_S… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h46297 #define PUF_SRAM_INT_CLR_STATUS_READY(x) (((uint32_t)(((uint32_t)(x)) << PUF_SRAM_INT_CLR_S… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h57926 #define PUF_SRAM_INT_CLR_STATUS_READY(x) (((uint32_t)(((uint32_t)(x)) << PUF_SRAM_INT_CLR_S… macro
DMCXN546_cm33_core1.h57926 #define PUF_SRAM_INT_CLR_STATUS_READY(x) (((uint32_t)(((uint32_t)(x)) << PUF_SRAM_INT_CLR_S… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h57926 #define PUF_SRAM_INT_CLR_STATUS_READY(x) (((uint32_t)(((uint32_t)(x)) << PUF_SRAM_INT_CLR_S… macro
DMCXN547_cm33_core1.h57926 #define PUF_SRAM_INT_CLR_STATUS_READY(x) (((uint32_t)(((uint32_t)(x)) << PUF_SRAM_INT_CLR_S… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h58661 #define PUF_SRAM_INT_CLR_STATUS_READY(x) (((uint32_t)(((uint32_t)(x)) << PUF_SRAM_INT_CLR_S… macro
DMCXN947_cm33_core0.h58661 #define PUF_SRAM_INT_CLR_STATUS_READY(x) (((uint32_t)(((uint32_t)(x)) << PUF_SRAM_INT_CLR_S… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h58661 #define PUF_SRAM_INT_CLR_STATUS_READY(x) (((uint32_t)(((uint32_t)(x)) << PUF_SRAM_INT_CLR_S… macro
DMCXN946_cm33_core1.h58661 #define PUF_SRAM_INT_CLR_STATUS_READY(x) (((uint32_t)(((uint32_t)(x)) << PUF_SRAM_INT_CLR_S… macro