Home
last modified time | relevance | path

Searched refs:PUF_ISR_INT_OK_MASK (Results 1 – 18 of 18) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S36/
DLPC55S36.h36098 #define PUF_ISR_INT_OK_MASK (0x2U) macro
36101 … (((uint32_t)(((uint32_t)(x)) << PUF_ISR_INT_OK_SHIFT)) & PUF_ISR_INT_OK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h45910 #define PUF_ISR_INT_OK_MASK (0x2U) macro
45913 … (((uint32_t)(((uint32_t)(x)) << PUF_ISR_INT_OK_SHIFT)) & PUF_ISR_INT_OK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h45880 #define PUF_ISR_INT_OK_MASK (0x2U) macro
45883 … (((uint32_t)(((uint32_t)(x)) << PUF_ISR_INT_OK_SHIFT)) & PUF_ISR_INT_OK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h57509 #define PUF_ISR_INT_OK_MASK (0x2U) macro
57512 … (((uint32_t)(((uint32_t)(x)) << PUF_ISR_INT_OK_SHIFT)) & PUF_ISR_INT_OK_MASK)
DMCXN546_cm33_core1.h57509 #define PUF_ISR_INT_OK_MASK (0x2U) macro
57512 … (((uint32_t)(((uint32_t)(x)) << PUF_ISR_INT_OK_SHIFT)) & PUF_ISR_INT_OK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h57509 #define PUF_ISR_INT_OK_MASK (0x2U) macro
57512 … (((uint32_t)(((uint32_t)(x)) << PUF_ISR_INT_OK_SHIFT)) & PUF_ISR_INT_OK_MASK)
DMCXN547_cm33_core1.h57509 #define PUF_ISR_INT_OK_MASK (0x2U) macro
57512 … (((uint32_t)(((uint32_t)(x)) << PUF_ISR_INT_OK_SHIFT)) & PUF_ISR_INT_OK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi4.h59791 #define PUF_ISR_INT_OK_MASK (0x2U) macro
59797 … (((uint32_t)(((uint32_t)(x)) << PUF_ISR_INT_OK_SHIFT)) & PUF_ISR_INT_OK_MASK)
DMIMXRT798S_cm33_core0.h59876 #define PUF_ISR_INT_OK_MASK (0x2U) macro
59882 … (((uint32_t)(((uint32_t)(x)) << PUF_ISR_INT_OK_SHIFT)) & PUF_ISR_INT_OK_MASK)
DMIMXRT798S_ezhv.h59758 #define PUF_ISR_INT_OK_MASK (0x2U) macro
59764 … (((uint32_t)(((uint32_t)(x)) << PUF_ISR_INT_OK_SHIFT)) & PUF_ISR_INT_OK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_ezhv.h56589 #define PUF_ISR_INT_OK_MASK (0x2U) macro
56595 … (((uint32_t)(((uint32_t)(x)) << PUF_ISR_INT_OK_SHIFT)) & PUF_ISR_INT_OK_MASK)
DMIMXRT735S_cm33_core0.h56651 #define PUF_ISR_INT_OK_MASK (0x2U) macro
56657 … (((uint32_t)(((uint32_t)(x)) << PUF_ISR_INT_OK_SHIFT)) & PUF_ISR_INT_OK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core0.h59876 #define PUF_ISR_INT_OK_MASK (0x2U) macro
59882 … (((uint32_t)(((uint32_t)(x)) << PUF_ISR_INT_OK_SHIFT)) & PUF_ISR_INT_OK_MASK)
DMIMXRT758S_ezhv.h59734 #define PUF_ISR_INT_OK_MASK (0x2U) macro
59740 … (((uint32_t)(((uint32_t)(x)) << PUF_ISR_INT_OK_SHIFT)) & PUF_ISR_INT_OK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h58244 #define PUF_ISR_INT_OK_MASK (0x2U) macro
58247 … (((uint32_t)(((uint32_t)(x)) << PUF_ISR_INT_OK_SHIFT)) & PUF_ISR_INT_OK_MASK)
DMCXN947_cm33_core0.h58244 #define PUF_ISR_INT_OK_MASK (0x2U) macro
58247 … (((uint32_t)(((uint32_t)(x)) << PUF_ISR_INT_OK_SHIFT)) & PUF_ISR_INT_OK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h58244 #define PUF_ISR_INT_OK_MASK (0x2U) macro
58247 … (((uint32_t)(((uint32_t)(x)) << PUF_ISR_INT_OK_SHIFT)) & PUF_ISR_INT_OK_MASK)
DMCXN946_cm33_core1.h58244 #define PUF_ISR_INT_OK_MASK (0x2U) macro
58247 … (((uint32_t)(((uint32_t)(x)) << PUF_ISR_INT_OK_SHIFT)) & PUF_ISR_INT_OK_MASK)