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Searched refs:PUF_AR_ALLOW_RECONSTRUCT_MASK (Results 1 – 17 of 17) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h45778 #define PUF_AR_ALLOW_RECONSTRUCT_MASK (0x8U) macro
45784 … (((uint32_t)(((uint32_t)(x)) << PUF_AR_ALLOW_RECONSTRUCT_SHIFT)) & PUF_AR_ALLOW_RECONSTRUCT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h45748 #define PUF_AR_ALLOW_RECONSTRUCT_MASK (0x8U) macro
45754 … (((uint32_t)(((uint32_t)(x)) << PUF_AR_ALLOW_RECONSTRUCT_SHIFT)) & PUF_AR_ALLOW_RECONSTRUCT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h57377 #define PUF_AR_ALLOW_RECONSTRUCT_MASK (0x8U) macro
57383 … (((uint32_t)(((uint32_t)(x)) << PUF_AR_ALLOW_RECONSTRUCT_SHIFT)) & PUF_AR_ALLOW_RECONSTRUCT_MASK)
DMCXN546_cm33_core1.h57377 #define PUF_AR_ALLOW_RECONSTRUCT_MASK (0x8U) macro
57383 … (((uint32_t)(((uint32_t)(x)) << PUF_AR_ALLOW_RECONSTRUCT_SHIFT)) & PUF_AR_ALLOW_RECONSTRUCT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h57377 #define PUF_AR_ALLOW_RECONSTRUCT_MASK (0x8U) macro
57383 … (((uint32_t)(((uint32_t)(x)) << PUF_AR_ALLOW_RECONSTRUCT_SHIFT)) & PUF_AR_ALLOW_RECONSTRUCT_MASK)
DMCXN547_cm33_core1.h57377 #define PUF_AR_ALLOW_RECONSTRUCT_MASK (0x8U) macro
57383 … (((uint32_t)(((uint32_t)(x)) << PUF_AR_ALLOW_RECONSTRUCT_SHIFT)) & PUF_AR_ALLOW_RECONSTRUCT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi4.h59635 #define PUF_AR_ALLOW_RECONSTRUCT_MASK (0x8U) macro
59641 … (((uint32_t)(((uint32_t)(x)) << PUF_AR_ALLOW_RECONSTRUCT_SHIFT)) & PUF_AR_ALLOW_RECONSTRUCT_MASK)
DMIMXRT798S_cm33_core0.h59720 #define PUF_AR_ALLOW_RECONSTRUCT_MASK (0x8U) macro
59726 … (((uint32_t)(((uint32_t)(x)) << PUF_AR_ALLOW_RECONSTRUCT_SHIFT)) & PUF_AR_ALLOW_RECONSTRUCT_MASK)
DMIMXRT798S_ezhv.h59602 #define PUF_AR_ALLOW_RECONSTRUCT_MASK (0x8U) macro
59608 … (((uint32_t)(((uint32_t)(x)) << PUF_AR_ALLOW_RECONSTRUCT_SHIFT)) & PUF_AR_ALLOW_RECONSTRUCT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_ezhv.h56433 #define PUF_AR_ALLOW_RECONSTRUCT_MASK (0x8U) macro
56439 … (((uint32_t)(((uint32_t)(x)) << PUF_AR_ALLOW_RECONSTRUCT_SHIFT)) & PUF_AR_ALLOW_RECONSTRUCT_MASK)
DMIMXRT735S_cm33_core0.h56495 #define PUF_AR_ALLOW_RECONSTRUCT_MASK (0x8U) macro
56501 … (((uint32_t)(((uint32_t)(x)) << PUF_AR_ALLOW_RECONSTRUCT_SHIFT)) & PUF_AR_ALLOW_RECONSTRUCT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core0.h59720 #define PUF_AR_ALLOW_RECONSTRUCT_MASK (0x8U) macro
59726 … (((uint32_t)(((uint32_t)(x)) << PUF_AR_ALLOW_RECONSTRUCT_SHIFT)) & PUF_AR_ALLOW_RECONSTRUCT_MASK)
DMIMXRT758S_ezhv.h59578 #define PUF_AR_ALLOW_RECONSTRUCT_MASK (0x8U) macro
59584 … (((uint32_t)(((uint32_t)(x)) << PUF_AR_ALLOW_RECONSTRUCT_SHIFT)) & PUF_AR_ALLOW_RECONSTRUCT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h58112 #define PUF_AR_ALLOW_RECONSTRUCT_MASK (0x8U) macro
58118 … (((uint32_t)(((uint32_t)(x)) << PUF_AR_ALLOW_RECONSTRUCT_SHIFT)) & PUF_AR_ALLOW_RECONSTRUCT_MASK)
DMCXN947_cm33_core0.h58112 #define PUF_AR_ALLOW_RECONSTRUCT_MASK (0x8U) macro
58118 … (((uint32_t)(((uint32_t)(x)) << PUF_AR_ALLOW_RECONSTRUCT_SHIFT)) & PUF_AR_ALLOW_RECONSTRUCT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h58112 #define PUF_AR_ALLOW_RECONSTRUCT_MASK (0x8U) macro
58118 … (((uint32_t)(((uint32_t)(x)) << PUF_AR_ALLOW_RECONSTRUCT_SHIFT)) & PUF_AR_ALLOW_RECONSTRUCT_MASK)
DMCXN946_cm33_core1.h58112 #define PUF_AR_ALLOW_RECONSTRUCT_MASK (0x8U) macro
58118 … (((uint32_t)(((uint32_t)(x)) << PUF_AR_ALLOW_RECONSTRUCT_SHIFT)) & PUF_AR_ALLOW_RECONSTRUCT_MASK)