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Searched refs:PORT_EDFR_EDF0_MASK (Results 1 – 14 of 14) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716A/
DMCXW716A.h26314 #define PORT_EDFR_EDF0_MASK (0x1U) macro
26320 … (((uint32_t)(((uint32_t)(x)) << PORT_EDFR_EDF0_SHIFT)) & PORT_EDFR_EDF0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716C/
DMCXW716C.h28483 #define PORT_EDFR_EDF0_MASK (0x1U) macro
28489 … (((uint32_t)(((uint32_t)(x)) << PORT_EDFR_EDF0_SHIFT)) & PORT_EDFR_EDF0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h44782 #define PORT_EDFR_EDF0_MASK (0x1U) macro
44788 … (((uint32_t)(((uint32_t)(x)) << PORT_EDFR_EDF0_SHIFT)) & PORT_EDFR_EDF0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h44752 #define PORT_EDFR_EDF0_MASK (0x1U) macro
44758 … (((uint32_t)(((uint32_t)(x)) << PORT_EDFR_EDF0_SHIFT)) & PORT_EDFR_EDF0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW727C/
DMCXW727C_cm33_core0.h33537 #define PORT_EDFR_EDF0_MASK (0x1U) macro
33543 … (((uint32_t)(((uint32_t)(x)) << PORT_EDFR_EDF0_SHIFT)) & PORT_EDFR_EDF0_MASK)
DMCXW727C_cm33_core1.h38732 #define PORT_EDFR_EDF0_MASK (0x1U) macro
38738 … (((uint32_t)(((uint32_t)(x)) << PORT_EDFR_EDF0_SHIFT)) & PORT_EDFR_EDF0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h55840 #define PORT_EDFR_EDF0_MASK (0x1U) macro
55846 … (((uint32_t)(((uint32_t)(x)) << PORT_EDFR_EDF0_SHIFT)) & PORT_EDFR_EDF0_MASK)
DMCXN546_cm33_core1.h55840 #define PORT_EDFR_EDF0_MASK (0x1U) macro
55846 … (((uint32_t)(((uint32_t)(x)) << PORT_EDFR_EDF0_SHIFT)) & PORT_EDFR_EDF0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h55840 #define PORT_EDFR_EDF0_MASK (0x1U) macro
55846 … (((uint32_t)(((uint32_t)(x)) << PORT_EDFR_EDF0_SHIFT)) & PORT_EDFR_EDF0_MASK)
DMCXN547_cm33_core1.h55840 #define PORT_EDFR_EDF0_MASK (0x1U) macro
55846 … (((uint32_t)(((uint32_t)(x)) << PORT_EDFR_EDF0_SHIFT)) & PORT_EDFR_EDF0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h56575 #define PORT_EDFR_EDF0_MASK (0x1U) macro
56581 … (((uint32_t)(((uint32_t)(x)) << PORT_EDFR_EDF0_SHIFT)) & PORT_EDFR_EDF0_MASK)
DMCXN947_cm33_core0.h56575 #define PORT_EDFR_EDF0_MASK (0x1U) macro
56581 … (((uint32_t)(((uint32_t)(x)) << PORT_EDFR_EDF0_SHIFT)) & PORT_EDFR_EDF0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h56575 #define PORT_EDFR_EDF0_MASK (0x1U) macro
56581 … (((uint32_t)(((uint32_t)(x)) << PORT_EDFR_EDF0_SHIFT)) & PORT_EDFR_EDF0_MASK)
DMCXN946_cm33_core1.h56575 #define PORT_EDFR_EDF0_MASK (0x1U) macro
56581 … (((uint32_t)(((uint32_t)(x)) << PORT_EDFR_EDF0_SHIFT)) & PORT_EDFR_EDF0_MASK)