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Searched refs:PM_RESC_SRAM_CPU0_DCACHE_RETENTION (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT735S/
Dfsl_pm_device.h333 #define PM_RESC_SRAM_CPU0_DCACHE_RETENTION PM_ENCODE_RESC(PM_RESOURCE_PARTABLE_ON1, kResc_SRAM_CPU0… macro
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT758S/
Dfsl_pm_device.h333 #define PM_RESC_SRAM_CPU0_DCACHE_RETENTION PM_ENCODE_RESC(PM_RESOURCE_PARTABLE_ON1, kResc_SRAM_CPU0… macro
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT798S/
Dfsl_pm_device.h333 #define PM_RESC_SRAM_CPU0_DCACHE_RETENTION PM_ENCODE_RESC(PM_RESOURCE_PARTABLE_ON1, kResc_SRAM_CPU0… macro