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Searched refs:PF3000_ModifyReg (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/components/pf3000/
Dfsl_pf3000.c561 PF3000_ModifyReg(handle, PF3000_PWR_CTRL, PF3000_PWR_CTRL_REGSCCP_ENABLE_MASK, temp); in PF3000_Init()
596 bool PF3000_ModifyReg(pf3000_handle_t *handle, uint8_t reg, uint8_t mask, uint8_t val) in PF3000_ModifyReg() function
647 PF3000_ModifyReg(handle, PF3000_SW_INT_MASK0, (source & 0xFFU), 0x0U); in PF3000_EnableInterrupts()
649 PF3000_ModifyReg(handle, PF3000_SW_INT_MASK1, ((source & 0xFF00U) >> 8U), 0x0U); in PF3000_EnableInterrupts()
651 PF3000_ModifyReg(handle, PF3000_SW_INT_MASK3, ((source & 0xFF0000U) >> 16U), 0x0U); in PF3000_EnableInterrupts()
653 PF3000_ModifyReg(handle, PF3000_SW_INT_MASK4, ((source & 0xFF000000U) >> 24), 0x0U); in PF3000_EnableInterrupts()
661 PF3000_ModifyReg(handle, PF3000_SW_INT_MASK0, 0x0U, (source & 0xFFU)); in PF3000_DisableInterrupts()
663 PF3000_ModifyReg(handle, PF3000_SW_INT_MASK1, 0x0U, ((source & 0xFF00U) >> 8U)); in PF3000_DisableInterrupts()
665 PF3000_ModifyReg(handle, PF3000_SW_INT_MASK3, 0x0U, ((source & 0xFF0000U) >> 16U)); in PF3000_DisableInterrupts()
667 PF3000_ModifyReg(handle, PF3000_SW_INT_MASK4, 0x0U, ((source & 0xFF000000U) >> 24)); in PF3000_DisableInterrupts()
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Dfsl_pf3000.h434 bool PF3000_ModifyReg(pf3000_handle_t *handle, uint8_t reg, uint8_t mask, uint8_t val);