Searched refs:PE6_ETH_1_RGMII_TST_TXD_0 (Results 1 – 2 of 2) sorted by relevance
527 #define PE6_ETH_1_RGMII_TST_TXD_0 NXP_S32_PINMUX(1, 1, 54, 1, 0, 0) macro
694 #define PE6_ETH_1_RGMII_TST_TXD_0 NXP_S32_PINMUX(1, 1, 54, 1, 0, 0) macro
