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Searched refs:NPX_NPXSR_V0_MASK (Results 1 – 11 of 11) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h41435 #define NPX_NPXSR_V0_MASK (0x100U) macro
41441 … (((uint32_t)(((uint32_t)(x)) << NPX_NPXSR_V0_SHIFT)) & NPX_NPXSR_V0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h41405 #define NPX_NPXSR_V0_MASK (0x100U) macro
41411 … (((uint32_t)(((uint32_t)(x)) << NPX_NPXSR_V0_SHIFT)) & NPX_NPXSR_V0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW727C/
DMCXW727C_cm33_core1.h38034 #define NPX_NPXSR_V0_MASK (0x100U) macro
38040 … (((uint32_t)(((uint32_t)(x)) << NPX_NPXSR_V0_SHIFT)) & NPX_NPXSR_V0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h52262 #define NPX_NPXSR_V0_MASK (0x100U) macro
52268 … (((uint32_t)(((uint32_t)(x)) << NPX_NPXSR_V0_SHIFT)) & NPX_NPXSR_V0_MASK)
DMCXN546_cm33_core1.h52262 #define NPX_NPXSR_V0_MASK (0x100U) macro
52268 … (((uint32_t)(((uint32_t)(x)) << NPX_NPXSR_V0_SHIFT)) & NPX_NPXSR_V0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h52262 #define NPX_NPXSR_V0_MASK (0x100U) macro
52268 … (((uint32_t)(((uint32_t)(x)) << NPX_NPXSR_V0_SHIFT)) & NPX_NPXSR_V0_MASK)
DMCXN547_cm33_core1.h52262 #define NPX_NPXSR_V0_MASK (0x100U) macro
52268 … (((uint32_t)(((uint32_t)(x)) << NPX_NPXSR_V0_SHIFT)) & NPX_NPXSR_V0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h52743 #define NPX_NPXSR_V0_MASK (0x100U) macro
52749 … (((uint32_t)(((uint32_t)(x)) << NPX_NPXSR_V0_SHIFT)) & NPX_NPXSR_V0_MASK)
DMCXN947_cm33_core0.h52743 #define NPX_NPXSR_V0_MASK (0x100U) macro
52749 … (((uint32_t)(((uint32_t)(x)) << NPX_NPXSR_V0_SHIFT)) & NPX_NPXSR_V0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h52743 #define NPX_NPXSR_V0_MASK (0x100U) macro
52749 … (((uint32_t)(((uint32_t)(x)) << NPX_NPXSR_V0_SHIFT)) & NPX_NPXSR_V0_MASK)
DMCXN946_cm33_core1.h52743 #define NPX_NPXSR_V0_MASK (0x100U) macro
52749 … (((uint32_t)(((uint32_t)(x)) << NPX_NPXSR_V0_SHIFT)) & NPX_NPXSR_V0_MASK)