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Searched refs:NIC_ENET_QOS_BASE (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/drivers/
Dfsl_nic301.h56 #define NIC_ENET_QOS_BASE (GPV1_BASE + 0x4A000) macro
83 kNIC_REG_READ_QOS_ENET_QOS = NIC_ENET_QOS_BASE + NIC_READ_QOS_OFFSET,
101 kNIC_REG_WRITE_QOS_ENET_QOS = NIC_ENET_QOS_BASE + NIC_WRITE_QOS_OFFSET,
119 kNIC_REG_FN_MOD_ENET_QOS = NIC_ENET_QOS_BASE + NIC_FN_MOD_OFFSET,
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/drivers/
Dfsl_nic301.h56 #define NIC_ENET_QOS_BASE (GPV1_BASE + 0x4A000) macro
83 kNIC_REG_READ_QOS_ENET_QOS = NIC_ENET_QOS_BASE + NIC_READ_QOS_OFFSET,
101 kNIC_REG_WRITE_QOS_ENET_QOS = NIC_ENET_QOS_BASE + NIC_WRITE_QOS_OFFSET,
119 kNIC_REG_FN_MOD_ENET_QOS = NIC_ENET_QOS_BASE + NIC_FN_MOD_OFFSET,
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/drivers/
Dfsl_nic301.h56 #define NIC_ENET_QOS_BASE (GPV1_BASE + 0x4A000) macro
83 kNIC_REG_READ_QOS_ENET_QOS = NIC_ENET_QOS_BASE + NIC_READ_QOS_OFFSET,
101 kNIC_REG_WRITE_QOS_ENET_QOS = NIC_ENET_QOS_BASE + NIC_WRITE_QOS_OFFSET,
119 kNIC_REG_FN_MOD_ENET_QOS = NIC_ENET_QOS_BASE + NIC_FN_MOD_OFFSET,
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/drivers/
Dfsl_nic301.h56 #define NIC_ENET_QOS_BASE (GPV1_BASE + 0x4A000) macro
83 kNIC_REG_READ_QOS_ENET_QOS = NIC_ENET_QOS_BASE + NIC_READ_QOS_OFFSET,
101 kNIC_REG_WRITE_QOS_ENET_QOS = NIC_ENET_QOS_BASE + NIC_WRITE_QOS_OFFSET,
119 kNIC_REG_FN_MOD_ENET_QOS = NIC_ENET_QOS_BASE + NIC_FN_MOD_OFFSET,
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/drivers/
Dfsl_nic301.h56 #define NIC_ENET_QOS_BASE (GPV1_BASE + 0x4A000) macro
83 kNIC_REG_READ_QOS_ENET_QOS = NIC_ENET_QOS_BASE + NIC_READ_QOS_OFFSET,
101 kNIC_REG_WRITE_QOS_ENET_QOS = NIC_ENET_QOS_BASE + NIC_WRITE_QOS_OFFSET,
119 kNIC_REG_FN_MOD_ENET_QOS = NIC_ENET_QOS_BASE + NIC_FN_MOD_OFFSET,
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/drivers/
Dfsl_nic301.h56 #define NIC_ENET_QOS_BASE (GPV1_BASE + 0x4A000) macro
83 kNIC_REG_READ_QOS_ENET_QOS = NIC_ENET_QOS_BASE + NIC_READ_QOS_OFFSET,
101 kNIC_REG_WRITE_QOS_ENET_QOS = NIC_ENET_QOS_BASE + NIC_WRITE_QOS_OFFSET,
119 kNIC_REG_FN_MOD_ENET_QOS = NIC_ENET_QOS_BASE + NIC_FN_MOD_OFFSET,
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/drivers/
Dfsl_nic301.h56 #define NIC_ENET_QOS_BASE (GPV1_BASE + 0x4A000) macro
83 kNIC_REG_READ_QOS_ENET_QOS = NIC_ENET_QOS_BASE + NIC_READ_QOS_OFFSET,
101 kNIC_REG_WRITE_QOS_ENET_QOS = NIC_ENET_QOS_BASE + NIC_WRITE_QOS_OFFSET,
119 kNIC_REG_FN_MOD_ENET_QOS = NIC_ENET_QOS_BASE + NIC_FN_MOD_OFFSET,