Searched refs:NETC_IERB_EMDIOMCR_NUM_MSIX_MASK (Results 1 – 9 of 9) sorted by relevance
640 #define NETC_IERB_EMDIOMCR_NUM_MSIX_MASK (0x1U) macro643 …int32_t)(((uint32_t)(x)) << NETC_IERB_EMDIOMCR_NUM_MSIX_SHIFT)) & NETC_IERB_EMDIOMCR_NUM_MSIX_MASK)
60644 #define NETC_IERB_EMDIOMCR_NUM_MSIX_MASK (0x1U) macro60646 …int32_t)(((uint32_t)(x)) << NETC_IERB_EMDIOMCR_NUM_MSIX_SHIFT)) & NETC_IERB_EMDIOMCR_NUM_MSIX_MASK)
56795 #define NETC_IERB_EMDIOMCR_NUM_MSIX_MASK (0x1U) macro56797 …int32_t)(((uint32_t)(x)) << NETC_IERB_EMDIOMCR_NUM_MSIX_SHIFT)) & NETC_IERB_EMDIOMCR_NUM_MSIX_MASK)
57066 #define NETC_IERB_EMDIOMCR_NUM_MSIX_MASK (0x1U) macro57068 …int32_t)(((uint32_t)(x)) << NETC_IERB_EMDIOMCR_NUM_MSIX_SHIFT)) & NETC_IERB_EMDIOMCR_NUM_MSIX_MASK)
55563 #define NETC_IERB_EMDIOMCR_NUM_MSIX_MASK (0x1U) macro55565 …int32_t)(((uint32_t)(x)) << NETC_IERB_EMDIOMCR_NUM_MSIX_SHIFT)) & NETC_IERB_EMDIOMCR_NUM_MSIX_MASK)
60914 #define NETC_IERB_EMDIOMCR_NUM_MSIX_MASK (0x1U) macro60916 …int32_t)(((uint32_t)(x)) << NETC_IERB_EMDIOMCR_NUM_MSIX_SHIFT)) & NETC_IERB_EMDIOMCR_NUM_MSIX_MASK)
59392 #define NETC_IERB_EMDIOMCR_NUM_MSIX_MASK (0x1U) macro59394 …int32_t)(((uint32_t)(x)) << NETC_IERB_EMDIOMCR_NUM_MSIX_SHIFT)) & NETC_IERB_EMDIOMCR_NUM_MSIX_MASK)
171575 #define NETC_IERB_EMDIOMCR_NUM_MSIX_MASK (0x1U) macro171577 …int32_t)(((uint32_t)(x)) << NETC_IERB_EMDIOMCR_NUM_MSIX_SHIFT)) & NETC_IERB_EMDIOMCR_NUM_MSIX_MASK)
171512 #define NETC_IERB_EMDIOMCR_NUM_MSIX_MASK (0x1U) macro171514 …int32_t)(((uint32_t)(x)) << NETC_IERB_EMDIOMCR_NUM_MSIX_SHIFT)) & NETC_IERB_EMDIOMCR_NUM_MSIX_MASK)
