Searched refs:NETC_IERB_EMCR_NUM_MSIX_MASK (Results 1 – 9 of 9) sorted by relevance
1614 #define NETC_IERB_EMCR_NUM_MSIX_MASK (0x7FFU) macro1617 … (((uint32_t)(((uint32_t)(x)) << NETC_IERB_EMCR_NUM_MSIX_SHIFT)) & NETC_IERB_EMCR_NUM_MSIX_MASK)
62127 #define NETC_IERB_EMCR_NUM_MSIX_MASK (0x7FFU) macro62129 … (((uint32_t)(((uint32_t)(x)) << NETC_IERB_EMCR_NUM_MSIX_SHIFT)) & NETC_IERB_EMCR_NUM_MSIX_MASK)
58278 #define NETC_IERB_EMCR_NUM_MSIX_MASK (0x7FFU) macro58280 … (((uint32_t)(((uint32_t)(x)) << NETC_IERB_EMCR_NUM_MSIX_SHIFT)) & NETC_IERB_EMCR_NUM_MSIX_MASK)
58549 #define NETC_IERB_EMCR_NUM_MSIX_MASK (0x7FFU) macro58551 … (((uint32_t)(((uint32_t)(x)) << NETC_IERB_EMCR_NUM_MSIX_SHIFT)) & NETC_IERB_EMCR_NUM_MSIX_MASK)
57046 #define NETC_IERB_EMCR_NUM_MSIX_MASK (0x7FFU) macro57048 … (((uint32_t)(((uint32_t)(x)) << NETC_IERB_EMCR_NUM_MSIX_SHIFT)) & NETC_IERB_EMCR_NUM_MSIX_MASK)
62397 #define NETC_IERB_EMCR_NUM_MSIX_MASK (0x7FFU) macro62399 … (((uint32_t)(((uint32_t)(x)) << NETC_IERB_EMCR_NUM_MSIX_SHIFT)) & NETC_IERB_EMCR_NUM_MSIX_MASK)
60875 #define NETC_IERB_EMCR_NUM_MSIX_MASK (0x7FFU) macro60877 … (((uint32_t)(((uint32_t)(x)) << NETC_IERB_EMCR_NUM_MSIX_SHIFT)) & NETC_IERB_EMCR_NUM_MSIX_MASK)
172131 #define NETC_IERB_EMCR_NUM_MSIX_MASK (0x7FFU) macro172133 … (((uint32_t)(((uint32_t)(x)) << NETC_IERB_EMCR_NUM_MSIX_SHIFT)) & NETC_IERB_EMCR_NUM_MSIX_MASK)
172068 #define NETC_IERB_EMCR_NUM_MSIX_MASK (0x7FFU) macro172070 … (((uint32_t)(((uint32_t)(x)) << NETC_IERB_EMCR_NUM_MSIX_SHIFT)) & NETC_IERB_EMCR_NUM_MSIX_MASK)
