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Searched refs:MWMSG_DDR_CONTROL2 (Results 1 – 25 of 49) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/
DMCXA142.h12319 …__O uint32_t MWMSG_DDR_CONTROL2; /**< Controller Write Message in DDR mode Control… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/
DMCXA143.h12319 …__O uint32_t MWMSG_DDR_CONTROL2; /**< Controller Write Message in DDR mode Control… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/
DMCXA153.h12319 …__O uint32_t MWMSG_DDR_CONTROL2; /**< Controller Write Message in DDR mode Control… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/
DMCXA152.h12319 …__O uint32_t MWMSG_DDR_CONTROL2; /**< Controller Write Message in DDR mode Control… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h15378 …__O uint32_t MWMSG_DDR_CONTROL2; /**< Controller Write Message in DDR Mode Control… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h15378 …__O uint32_t MWMSG_DDR_CONTROL2; /**< Controller Write Message in DDR Mode Control… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h15378 …__O uint32_t MWMSG_DDR_CONTROL2; /**< Controller Write Message in DDR Mode Control… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/
DMCXA156.h15382 …__O uint32_t MWMSG_DDR_CONTROL2; /**< Controller Write Message in DDR Mode Control… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/
DMCXA154.h15382 …__O uint32_t MWMSG_DDR_CONTROL2; /**< Controller Write Message in DDR Mode Control… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/
DMCXA155.h15382 …__O uint32_t MWMSG_DDR_CONTROL2; /**< Controller Write Message in DDR Mode Control… member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h22009 …__O uint32_t MWMSG_DDR_CONTROL2; /**< Controller Write Message in DDR mode Control… member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h22009 …__O uint32_t MWMSG_DDR_CONTROL2; /**< Controller Write Message in DDR mode Control… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h24529 …__IO uint32_t MWMSG_DDR_CONTROL2; /**< Controller Write Message in DDR Mode Control… member
DMIMXRT735S_cm33_core1.h24573 …__IO uint32_t MWMSG_DDR_CONTROL2; /**< Controller Write Message in DDR Mode Control… member
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S36/
DLPC55S36.h22008 …__O uint32_t MWMSG_DDR_CONTROL2; /**< Controller Write Message in DDR mode Control… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h24573 …__IO uint32_t MWMSG_DDR_CONTROL2; /**< Controller Write Message in DDR Mode Control… member
DMIMXRT758S_hifi1.h24529 …__IO uint32_t MWMSG_DDR_CONTROL2; /**< Controller Write Message in DDR Mode Control… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h24351 …__O uint32_t MWMSG_DDR_CONTROL2; /**< Controller Write Message in DDR Mode Control… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h24321 …__O uint32_t MWMSG_DDR_CONTROL2; /**< Controller Write Message in DDR Mode Control… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h24529 …__IO uint32_t MWMSG_DDR_CONTROL2; /**< Controller Write Message in DDR Mode Control… member
DMIMXRT798S_cm33_core1.h24573 …__IO uint32_t MWMSG_DDR_CONTROL2; /**< Controller Write Message in DDR Mode Control… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW727C/
DMCXW727C_cm33_core0.h19051 …__O uint32_t MWMSG_DDR_CONTROL2; /**< Controller Write Message in DDR Mode Control… member
DMCXW727C_cm33_core1.h27363 …__O uint32_t MWMSG_DDR_CONTROL2; /**< Controller Write Message in DDR Mode Control… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h33233 …__O uint32_t MWMSG_DDR_CONTROL2; /**< Controller Write Message in DDR Mode Control… member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h33233 …__O uint32_t MWMSG_DDR_CONTROL2; /**< Controller Write Message in DDR Mode Control… member

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