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Searched refs:MTB_MASTER_SFRWPRIV_MASK (Results 1 – 25 of 54) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/LPC811/
DLPC811.h1800 #define MTB_MASTER_SFRWPRIV_MASK (0x80U) macro
1807 … (((uint32_t)(((uint32_t)(x)) << MTB_MASTER_SFRWPRIV_SHIFT)) & MTB_MASTER_SFRWPRIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC041/
DMCXC041.h3399 #define MTB_MASTER_SFRWPRIV_MASK (0x80U) macro
3402 … (((uint32_t)(((uint32_t)(x)) << MTB_MASTER_SFRWPRIV_SHIFT)) & MTB_MASTER_SFRWPRIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC812/
DLPC812.h1804 #define MTB_MASTER_SFRWPRIV_MASK (0x80U) macro
1811 … (((uint32_t)(((uint32_t)(x)) << MTB_MASTER_SFRWPRIV_SHIFT)) & MTB_MASTER_SFRWPRIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC810/
DLPC810.h1800 #define MTB_MASTER_SFRWPRIV_MASK (0x80U) macro
1807 … (((uint32_t)(((uint32_t)(x)) << MTB_MASTER_SFRWPRIV_SHIFT)) & MTB_MASTER_SFRWPRIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC824/
DLPC824.h3364 #define MTB_MASTER_SFRWPRIV_MASK (0x80U) macro
3371 … (((uint32_t)(((uint32_t)(x)) << MTB_MASTER_SFRWPRIV_SHIFT)) & MTB_MASTER_SFRWPRIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC822/
DLPC822.h3364 #define MTB_MASTER_SFRWPRIV_MASK (0x80U) macro
3371 … (((uint32_t)(((uint32_t)(x)) << MTB_MASTER_SFRWPRIV_SHIFT)) & MTB_MASTER_SFRWPRIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC834/
DLPC834.h3208 #define MTB_MASTER_SFRWPRIV_MASK (0x80U) macro
3215 … (((uint32_t)(((uint32_t)(x)) << MTB_MASTER_SFRWPRIV_SHIFT)) & MTB_MASTER_SFRWPRIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC832/
DLPC832.h3208 #define MTB_MASTER_SFRWPRIV_MASK (0x80U) macro
3215 … (((uint32_t)(((uint32_t)(x)) << MTB_MASTER_SFRWPRIV_SHIFT)) & MTB_MASTER_SFRWPRIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL17Z644/
DMKL17Z644.h4732 #define MTB_MASTER_SFRWPRIV_MASK (0x80U) macro
4734 … (((uint32_t)(((uint32_t)(x)) << MTB_MASTER_SFRWPRIV_SHIFT)) & MTB_MASTER_SFRWPRIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC141/
DMCXC141.h5283 #define MTB_MASTER_SFRWPRIV_MASK (0x80U) macro
5286 … (((uint32_t)(((uint32_t)(x)) << MTB_MASTER_SFRWPRIV_SHIFT)) & MTB_MASTER_SFRWPRIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC142/
DMCXC142.h5281 #define MTB_MASTER_SFRWPRIV_MASK (0x80U) macro
5284 … (((uint32_t)(((uint32_t)(x)) << MTB_MASTER_SFRWPRIV_SHIFT)) & MTB_MASTER_SFRWPRIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL25Z4/
DMKL25Z4.h2364 #define MTB_MASTER_SFRWPRIV_MASK (0x80U) macro
2366 … (((uint32_t)(((uint32_t)(x)) << MTB_MASTER_SFRWPRIV_SHIFT)) & MTB_MASTER_SFRWPRIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC844/
DLPC844.h3821 #define MTB_MASTER_SFRWPRIV_MASK (0x80U) macro
3828 … (((uint32_t)(((uint32_t)(x)) << MTB_MASTER_SFRWPRIV_SHIFT)) & MTB_MASTER_SFRWPRIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC845/
DLPC845.h4345 #define MTB_MASTER_SFRWPRIV_MASK (0x80U) macro
4352 … (((uint32_t)(((uint32_t)(x)) << MTB_MASTER_SFRWPRIV_SHIFT)) & MTB_MASTER_SFRWPRIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC242/
DMCXC242.h5283 #define MTB_MASTER_SFRWPRIV_MASK (0x80U) macro
5286 … (((uint32_t)(((uint32_t)(x)) << MTB_MASTER_SFRWPRIV_SHIFT)) & MTB_MASTER_SFRWPRIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL27Z644/
DMKL27Z644.h4741 #define MTB_MASTER_SFRWPRIV_MASK (0x80U) macro
4743 … (((uint32_t)(((uint32_t)(x)) << MTB_MASTER_SFRWPRIV_SHIFT)) & MTB_MASTER_SFRWPRIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC144/
DMCXC144.h5942 #define MTB_MASTER_SFRWPRIV_MASK (0x80U) macro
5945 … (((uint32_t)(((uint32_t)(x)) << MTB_MASTER_SFRWPRIV_SHIFT)) & MTB_MASTER_SFRWPRIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC143/
DMCXC143.h5942 #define MTB_MASTER_SFRWPRIV_MASK (0x80U) macro
5945 … (((uint32_t)(((uint32_t)(x)) << MTB_MASTER_SFRWPRIV_SHIFT)) & MTB_MASTER_SFRWPRIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC243/
DMCXC243.h5940 #define MTB_MASTER_SFRWPRIV_MASK (0x80U) macro
5943 … (((uint32_t)(((uint32_t)(x)) << MTB_MASTER_SFRWPRIV_SHIFT)) & MTB_MASTER_SFRWPRIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC244/
DMCXC244.h5942 #define MTB_MASTER_SFRWPRIV_MASK (0x80U) macro
5945 … (((uint32_t)(((uint32_t)(x)) << MTB_MASTER_SFRWPRIV_SHIFT)) & MTB_MASTER_SFRWPRIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/
DMKV10Z7.h6297 #define MTB_MASTER_SFRWPRIV_MASK (0x80U) macro
6299 … (((uint32_t)(((uint32_t)(x)) << MTB_MASTER_SFRWPRIV_SHIFT)) & MTB_MASTER_SFRWPRIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h6933 #define MTB_MASTER_SFRWPRIV_MASK (0x80U) macro
6937 … (((uint32_t)(((uint32_t)(x)) << MTB_MASTER_SFRWPRIV_SHIFT)) & MTB_MASTER_SFRWPRIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/
DMKE15Z4.h6934 #define MTB_MASTER_SFRWPRIV_MASK (0x80U) macro
6938 … (((uint32_t)(((uint32_t)(x)) << MTB_MASTER_SFRWPRIV_SHIFT)) & MTB_MASTER_SFRWPRIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z1287/
DMKV10Z1287.h7071 #define MTB_MASTER_SFRWPRIV_MASK (0x80U) macro
7073 … (((uint32_t)(((uint32_t)(x)) << MTB_MASTER_SFRWPRIV_SHIFT)) & MTB_MASTER_SFRWPRIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM14ZA5/
DMKM14ZA5.h6714 #define MTB_MASTER_SFRWPRIV_MASK (0x80U) macro
6718 … (((uint32_t)(((uint32_t)(x)) << MTB_MASTER_SFRWPRIV_SHIFT)) & MTB_MASTER_SFRWPRIV_MASK)

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