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Searched refs:MCM_PLACR_EFDS_MASK (Results 1 – 25 of 50) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/flash/
Dfsl_ftfx_cache.c236 MCM0_CACHE_REG |= MCM_PLACR_EFDS_MASK; in FTFx_CACHE_PflashSetPrefetchSpeculation()
240 MCM0_CACHE_REG &= ~MCM_PLACR_EFDS_MASK; in FTFx_CACHE_PflashSetPrefetchSpeculation()
317 if (0U == (value & MCM_PLACR_EFDS_MASK)) in FTFx_CACHE_PflashGetPrefetchSpeculation()
/hal_nxp-latest/mcux/mcux-sdk/drivers/flash_ftmr/
Dfsl_flash.c1861 *regBase |= MCM_PLACR_EFDS_MASK; in FLASH_PflashSetPrefetchSpeculation()
1865 *regBase &= ~MCM_PLACR_EFDS_MASK; in FLASH_PflashSetPrefetchSpeculation()
1946 if (0UL == (value & MCM_PLACR_EFDS_MASK)) in FLASH_PflashGetPrefetchSpeculation()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC041/
DMCXC041.h3246 #define MCM_PLACR_EFDS_MASK (0x4000U) macro
3252 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_EFDS_SHIFT)) & MCM_PLACR_EFDS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE04Z4/
DMKE04Z4.h3524 #define MCM_PLACR_EFDS_MASK (0x4000U) macro
3530 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_EFDS_SHIFT)) & MCM_PLACR_EFDS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE02Z4/
DMKE02Z4.h3596 #define MCM_PLACR_EFDS_MASK (0x4000U) macro
3602 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_EFDS_SHIFT)) & MCM_PLACR_EFDS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE04Z1284/
DMKE04Z1284.h3584 #define MCM_PLACR_EFDS_MASK (0x4000U) macro
3590 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_EFDS_SHIFT)) & MCM_PLACR_EFDS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE06Z4/
DMKE06Z4.h3584 #define MCM_PLACR_EFDS_MASK (0x4000U) macro
3590 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_EFDS_SHIFT)) & MCM_PLACR_EFDS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL17Z644/
DMKL17Z644.h4594 #define MCM_PLACR_EFDS_MASK (0x4000U) macro
4600 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_EFDS_SHIFT)) & MCM_PLACR_EFDS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC141/
DMCXC141.h5129 #define MCM_PLACR_EFDS_MASK (0x4000U) macro
5135 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_EFDS_SHIFT)) & MCM_PLACR_EFDS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC142/
DMCXC142.h5127 #define MCM_PLACR_EFDS_MASK (0x4000U) macro
5133 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_EFDS_SHIFT)) & MCM_PLACR_EFDS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL25Z4/
DMKL25Z4.h2256 #define MCM_PLACR_EFDS_MASK (0x4000U) macro
2258 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_EFDS_SHIFT)) & MCM_PLACR_EFDS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC242/
DMCXC242.h5129 #define MCM_PLACR_EFDS_MASK (0x4000U) macro
5135 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_EFDS_SHIFT)) & MCM_PLACR_EFDS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL27Z644/
DMKL27Z644.h4603 #define MCM_PLACR_EFDS_MASK (0x4000U) macro
4609 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_EFDS_SHIFT)) & MCM_PLACR_EFDS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC144/
DMCXC144.h5788 #define MCM_PLACR_EFDS_MASK (0x4000U) macro
5794 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_EFDS_SHIFT)) & MCM_PLACR_EFDS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC143/
DMCXC143.h5788 #define MCM_PLACR_EFDS_MASK (0x4000U) macro
5794 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_EFDS_SHIFT)) & MCM_PLACR_EFDS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC243/
DMCXC243.h5786 #define MCM_PLACR_EFDS_MASK (0x4000U) macro
5792 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_EFDS_SHIFT)) & MCM_PLACR_EFDS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC244/
DMCXC244.h5788 #define MCM_PLACR_EFDS_MASK (0x4000U) macro
5794 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_EFDS_SHIFT)) & MCM_PLACR_EFDS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/
DMKV10Z7.h6016 #define MCM_PLACR_EFDS_MASK (0x4000U) macro
6022 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_EFDS_SHIFT)) & MCM_PLACR_EFDS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h6634 #define MCM_PLACR_EFDS_MASK (0x4000U) macro
6640 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_EFDS_SHIFT)) & MCM_PLACR_EFDS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/
DMKE15Z4.h6635 #define MCM_PLACR_EFDS_MASK (0x4000U) macro
6641 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_EFDS_SHIFT)) & MCM_PLACR_EFDS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z1287/
DMKV10Z1287.h6790 #define MCM_PLACR_EFDS_MASK (0x4000U) macro
6796 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_EFDS_SHIFT)) & MCM_PLACR_EFDS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM14ZA5/
DMKM14ZA5.h6497 #define MCM_PLACR_EFDS_MASK (0x4000U) macro
6503 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_EFDS_SHIFT)) & MCM_PLACR_EFDS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/
DMKE16Z4.h6633 #define MCM_PLACR_EFDS_MASK (0x4000U) macro
6639 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_EFDS_SHIFT)) & MCM_PLACR_EFDS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h9844 #define MCM_PLACR_EFDS_MASK (0x4000U) macro
9850 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_EFDS_SHIFT)) & MCM_PLACR_EFDS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/
DMKE12Z9.h9673 #define MCM_PLACR_EFDS_MASK (0x4000U) macro
9679 … (((uint32_t)(((uint32_t)(x)) << MCM_PLACR_EFDS_SHIFT)) & MCM_PLACR_EFDS_MASK)

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