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Searched refs:MAINPLL0CLKSEL_OFFSET (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/drivers/
Dfsl_clock.h900 #define MAINPLL0CLKSEL_OFFSET 0x200 macro
1469 … CLKCTL2_TUPLE_MUXA(MAINPLL0CLKSEL_OFFSET, 0), /*!< Attach FRO1_DIV8 clock to Main PLL0 Clock. */
1471 … CLKCTL2_TUPLE_MUXA(MAINPLL0CLKSEL_OFFSET, 1), /*!< Attach OSC_CLK clock to Main PLL0 Clock. */
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/drivers/
Dfsl_clock.h900 #define MAINPLL0CLKSEL_OFFSET 0x200 macro
1469 … CLKCTL2_TUPLE_MUXA(MAINPLL0CLKSEL_OFFSET, 0), /*!< Attach FRO1_DIV8 clock to Main PLL0 Clock. */
1471 … CLKCTL2_TUPLE_MUXA(MAINPLL0CLKSEL_OFFSET, 1), /*!< Attach OSC_CLK clock to Main PLL0 Clock. */
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/drivers/
Dfsl_clock.h900 #define MAINPLL0CLKSEL_OFFSET 0x200 macro
1469 … CLKCTL2_TUPLE_MUXA(MAINPLL0CLKSEL_OFFSET, 0), /*!< Attach FRO1_DIV8 clock to Main PLL0 Clock. */
1471 … CLKCTL2_TUPLE_MUXA(MAINPLL0CLKSEL_OFFSET, 1), /*!< Attach OSC_CLK clock to Main PLL0 Clock. */