| /hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt1180/jlinkscript/ |
| D | evkmimxrt1180_cm33.jlinkscript | 131 //FLEXSPI1->LUTCR = 0x02;
208 //FLEXSPI1->LUTCR = 0x01;
347 MEM_WriteU32(0x445E001C, 0x00000002); // LUTCR
369 MEM_WriteU32(0x445E001C, 0x00000001); // LUTCR
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| D | evkmimxrt1180_cm7.jlinkscript | 131 //FLEXSPI1->LUTCR = 0x02;
208 //FLEXSPI1->LUTCR = 0x01;
347 MEM_WriteU32(0x445E001C, 0x00000002); // LUTCR
369 MEM_WriteU32(0x445E001C, 0x00000001); // LUTCR
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/flexspi/ |
| D | fsl_flexspi.c | 606 base->LUTCR = 0x02; in FLEXSPI_UpdateLUT()
618 base->LUTCR = 0x01; in FLEXSPI_UpdateLUT()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/ |
| D | MIMXRT685S_dsp.h | 7141 __IO uint32_t LUTCR; /**< LUT Control Register, offset: 0x1C */ member
|
| D | MIMXRT685S_cm33.h | 13118 __IO uint32_t LUTCR; /**< LUT Control Register, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/ |
| D | MIMXRT1011.h | 13404 __IO uint32_t LUTCR; /**< LUT Control Register, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/ |
| D | MIMXRT1015.h | 15918 __IO uint32_t LUTCR; /**< LUT Control Register, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/ |
| D | MIMXRT633S.h | 13118 __IO uint32_t LUTCR; /**< LUT Control Register, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/ |
| D | MIMXRT595S_dsp.h | 12987 __IO uint32_t LUTCR; /**< LUT Control Register, offset: 0x1C */ member
|
| D | MIMXRT595S_cm33.h | 19585 __IO uint32_t LUTCR; /**< LUT Control Register, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/ |
| D | MIMXRT1024.h | 19237 __IO uint32_t LUTCR; /**< LUT Control Register, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/ |
| D | LPC5536.h | 13440 __IO uint32_t LUTCR; /**< LUT Control, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/ |
| D | LPC5534.h | 13440 __IO uint32_t LUTCR; /**< LUT Control, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/ |
| D | MIMXRT1021.h | 19257 __IO uint32_t LUTCR; /**< LUT Control Register, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/ |
| D | MIMXRT1051.h | 20214 __IO uint32_t LUTCR; /**< LUT Control Register, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/ |
| D | MIMXRT1041.h | 21366 __IO uint32_t LUTCR; /**< LUT Control Register, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/ |
| D | MIMXRT1052.h | 20999 __IO uint32_t LUTCR; /**< LUT Control Register, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/ |
| D | MIMXRT1042.h | 21368 __IO uint32_t LUTCR; /**< LUT Control Register, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/ |
| D | MIMXRT533S.h | 19581 __IO uint32_t LUTCR; /**< LUT Control Register, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/ |
| D | MIMXRT1061.h | 21743 __IO uint32_t LUTCR; /**< LUT Control Register, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN5/ |
| D | MIMX8MN5_cm7.h | 26856 __IO uint32_t LUTCR; /**< LUT Control Register, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN2/ |
| D | MIMX8MN2_cm7.h | 26854 __IO uint32_t LUTCR; /**< LUT Control Register, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN4/ |
| D | MIMX8MN4_cm7.h | 26854 __IO uint32_t LUTCR; /**< LUT Control Register, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN3/ |
| D | MIMX8MN3_cm7.h | 26856 __IO uint32_t LUTCR; /**< LUT Control Register, offset: 0x1C */ member
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/ |
| D | MIMXRT555S.h | 19584 __IO uint32_t LUTCR; /**< LUT Control Register, offset: 0x1C */ member
|
