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Searched refs:LPCMP_DCR_VRSEL_MASK (Results 1 – 25 of 27) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/
DS32K344_LPCMP.h281 #define LPCMP_DCR_VRSEL_MASK (0x100U) macro
284 … (((uint32_t)(((uint32_t)(x)) << LPCMP_DCR_VRSEL_SHIFT)) & LPCMP_DCR_VRSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm4.h10673 #define LPCMP_DCR_VRSEL_MASK (0x100U) macro
10679 … (((uint32_t)(((uint32_t)(x)) << LPCMP_DCR_VRSEL_SHIFT)) & LPCMP_DCR_VRSEL_MASK)
DK32L3A60_cm0plus.h9965 #define LPCMP_DCR_VRSEL_MASK (0x100U) macro
9971 … (((uint32_t)(((uint32_t)(x)) << LPCMP_DCR_VRSEL_SHIFT)) & LPCMP_DCR_VRSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/
DMCXA142.h16946 #define LPCMP_DCR_VRSEL_MASK (0x100U) macro
16952 … (((uint32_t)(((uint32_t)(x)) << LPCMP_DCR_VRSEL_SHIFT)) & LPCMP_DCR_VRSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/
DMCXA143.h16946 #define LPCMP_DCR_VRSEL_MASK (0x100U) macro
16952 … (((uint32_t)(((uint32_t)(x)) << LPCMP_DCR_VRSEL_SHIFT)) & LPCMP_DCR_VRSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/
DMCXA153.h16946 #define LPCMP_DCR_VRSEL_MASK (0x100U) macro
16952 … (((uint32_t)(((uint32_t)(x)) << LPCMP_DCR_VRSEL_SHIFT)) & LPCMP_DCR_VRSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/
DMCXA152.h16946 #define LPCMP_DCR_VRSEL_MASK (0x100U) macro
16952 … (((uint32_t)(((uint32_t)(x)) << LPCMP_DCR_VRSEL_SHIFT)) & LPCMP_DCR_VRSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h23162 #define LPCMP_DCR_VRSEL_MASK (0x100U) macro
23168 … (((uint32_t)(((uint32_t)(x)) << LPCMP_DCR_VRSEL_SHIFT)) & LPCMP_DCR_VRSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h23162 #define LPCMP_DCR_VRSEL_MASK (0x100U) macro
23168 … (((uint32_t)(((uint32_t)(x)) << LPCMP_DCR_VRSEL_SHIFT)) & LPCMP_DCR_VRSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h23162 #define LPCMP_DCR_VRSEL_MASK (0x100U) macro
23168 … (((uint32_t)(((uint32_t)(x)) << LPCMP_DCR_VRSEL_SHIFT)) & LPCMP_DCR_VRSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/
DMCXA156.h23166 #define LPCMP_DCR_VRSEL_MASK (0x100U) macro
23172 … (((uint32_t)(((uint32_t)(x)) << LPCMP_DCR_VRSEL_SHIFT)) & LPCMP_DCR_VRSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/
DMCXA154.h23166 #define LPCMP_DCR_VRSEL_MASK (0x100U) macro
23172 … (((uint32_t)(((uint32_t)(x)) << LPCMP_DCR_VRSEL_SHIFT)) & LPCMP_DCR_VRSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/
DMCXA155.h23166 #define LPCMP_DCR_VRSEL_MASK (0x100U) macro
23172 … (((uint32_t)(((uint32_t)(x)) << LPCMP_DCR_VRSEL_SHIFT)) & LPCMP_DCR_VRSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716A/
DMCXW716A.h18656 #define LPCMP_DCR_VRSEL_MASK (0x100U) macro
18662 … (((uint32_t)(((uint32_t)(x)) << LPCMP_DCR_VRSEL_SHIFT)) & LPCMP_DCR_VRSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716C/
DMCXW716C.h20825 #define LPCMP_DCR_VRSEL_MASK (0x100U) macro
20831 … (((uint32_t)(((uint32_t)(x)) << LPCMP_DCR_VRSEL_SHIFT)) & LPCMP_DCR_VRSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h36401 #define LPCMP_DCR_VRSEL_MASK (0x100U) macro
36407 … (((uint32_t)(((uint32_t)(x)) << LPCMP_DCR_VRSEL_SHIFT)) & LPCMP_DCR_VRSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h36371 #define LPCMP_DCR_VRSEL_MASK (0x100U) macro
36377 … (((uint32_t)(((uint32_t)(x)) << LPCMP_DCR_VRSEL_SHIFT)) & LPCMP_DCR_VRSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW727C/
DMCXW727C_cm33_core0.h21662 #define LPCMP_DCR_VRSEL_MASK (0x100U) macro
21668 … (((uint32_t)(((uint32_t)(x)) << LPCMP_DCR_VRSEL_SHIFT)) & LPCMP_DCR_VRSEL_MASK)
DMCXW727C_cm33_core1.h29972 #define LPCMP_DCR_VRSEL_MASK (0x100U) macro
29978 … (((uint32_t)(((uint32_t)(x)) << LPCMP_DCR_VRSEL_SHIFT)) & LPCMP_DCR_VRSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h46592 #define LPCMP_DCR_VRSEL_MASK (0x100U) macro
46598 … (((uint32_t)(((uint32_t)(x)) << LPCMP_DCR_VRSEL_SHIFT)) & LPCMP_DCR_VRSEL_MASK)
DMCXN546_cm33_core1.h46592 #define LPCMP_DCR_VRSEL_MASK (0x100U) macro
46598 … (((uint32_t)(((uint32_t)(x)) << LPCMP_DCR_VRSEL_SHIFT)) & LPCMP_DCR_VRSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h46592 #define LPCMP_DCR_VRSEL_MASK (0x100U) macro
46598 … (((uint32_t)(((uint32_t)(x)) << LPCMP_DCR_VRSEL_SHIFT)) & LPCMP_DCR_VRSEL_MASK)
DMCXN547_cm33_core1.h46592 #define LPCMP_DCR_VRSEL_MASK (0x100U) macro
46598 … (((uint32_t)(((uint32_t)(x)) << LPCMP_DCR_VRSEL_SHIFT)) & LPCMP_DCR_VRSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h47027 #define LPCMP_DCR_VRSEL_MASK (0x100U) macro
47033 … (((uint32_t)(((uint32_t)(x)) << LPCMP_DCR_VRSEL_SHIFT)) & LPCMP_DCR_VRSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h47027 #define LPCMP_DCR_VRSEL_MASK (0x100U) macro
47033 … (((uint32_t)(((uint32_t)(x)) << LPCMP_DCR_VRSEL_SHIFT)) & LPCMP_DCR_VRSEL_MASK)

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