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Searched refs:LPCMP_CCR2_PSEL_MASK (Results 1 – 25 of 28) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/
DS32K344_LPCMP.h252 #define LPCMP_CCR2_PSEL_MASK (0x70000U) macro
255 … (((uint32_t)(((uint32_t)(x)) << LPCMP_CCR2_PSEL_SHIFT)) & LPCMP_CCR2_PSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/drivers/lpcmp/
Dfsl_lpcmp.c238 tmp32 = base->CCR2 & ~(LPCMP_CCR2_PSEL_MASK | LPCMP_CCR2_MSEL_MASK); in LPCMP_SetInputChannels()
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm4.h10625 #define LPCMP_CCR2_PSEL_MASK (0x70000U) macro
10637 … (((uint32_t)(((uint32_t)(x)) << LPCMP_CCR2_PSEL_SHIFT)) & LPCMP_CCR2_PSEL_MASK)
DK32L3A60_cm0plus.h9917 #define LPCMP_CCR2_PSEL_MASK (0x70000U) macro
9929 … (((uint32_t)(((uint32_t)(x)) << LPCMP_CCR2_PSEL_SHIFT)) & LPCMP_CCR2_PSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/
DMCXA142.h16898 #define LPCMP_CCR2_PSEL_MASK (0x70000U) macro
16910 … (((uint32_t)(((uint32_t)(x)) << LPCMP_CCR2_PSEL_SHIFT)) & LPCMP_CCR2_PSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/
DMCXA143.h16898 #define LPCMP_CCR2_PSEL_MASK (0x70000U) macro
16910 … (((uint32_t)(((uint32_t)(x)) << LPCMP_CCR2_PSEL_SHIFT)) & LPCMP_CCR2_PSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/
DMCXA153.h16898 #define LPCMP_CCR2_PSEL_MASK (0x70000U) macro
16910 … (((uint32_t)(((uint32_t)(x)) << LPCMP_CCR2_PSEL_SHIFT)) & LPCMP_CCR2_PSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/
DMCXA152.h16898 #define LPCMP_CCR2_PSEL_MASK (0x70000U) macro
16910 … (((uint32_t)(((uint32_t)(x)) << LPCMP_CCR2_PSEL_SHIFT)) & LPCMP_CCR2_PSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h23114 #define LPCMP_CCR2_PSEL_MASK (0x70000U) macro
23126 … (((uint32_t)(((uint32_t)(x)) << LPCMP_CCR2_PSEL_SHIFT)) & LPCMP_CCR2_PSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h23114 #define LPCMP_CCR2_PSEL_MASK (0x70000U) macro
23126 … (((uint32_t)(((uint32_t)(x)) << LPCMP_CCR2_PSEL_SHIFT)) & LPCMP_CCR2_PSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h23114 #define LPCMP_CCR2_PSEL_MASK (0x70000U) macro
23126 … (((uint32_t)(((uint32_t)(x)) << LPCMP_CCR2_PSEL_SHIFT)) & LPCMP_CCR2_PSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/
DMCXA156.h23118 #define LPCMP_CCR2_PSEL_MASK (0x70000U) macro
23130 … (((uint32_t)(((uint32_t)(x)) << LPCMP_CCR2_PSEL_SHIFT)) & LPCMP_CCR2_PSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/
DMCXA154.h23118 #define LPCMP_CCR2_PSEL_MASK (0x70000U) macro
23130 … (((uint32_t)(((uint32_t)(x)) << LPCMP_CCR2_PSEL_SHIFT)) & LPCMP_CCR2_PSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/
DMCXA155.h23118 #define LPCMP_CCR2_PSEL_MASK (0x70000U) macro
23130 … (((uint32_t)(((uint32_t)(x)) << LPCMP_CCR2_PSEL_SHIFT)) & LPCMP_CCR2_PSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716A/
DMCXW716A.h18608 #define LPCMP_CCR2_PSEL_MASK (0x70000U) macro
18620 … (((uint32_t)(((uint32_t)(x)) << LPCMP_CCR2_PSEL_SHIFT)) & LPCMP_CCR2_PSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716C/
DMCXW716C.h20777 #define LPCMP_CCR2_PSEL_MASK (0x70000U) macro
20789 … (((uint32_t)(((uint32_t)(x)) << LPCMP_CCR2_PSEL_SHIFT)) & LPCMP_CCR2_PSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h36353 #define LPCMP_CCR2_PSEL_MASK (0x70000U) macro
36365 … (((uint32_t)(((uint32_t)(x)) << LPCMP_CCR2_PSEL_SHIFT)) & LPCMP_CCR2_PSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h36323 #define LPCMP_CCR2_PSEL_MASK (0x70000U) macro
36335 … (((uint32_t)(((uint32_t)(x)) << LPCMP_CCR2_PSEL_SHIFT)) & LPCMP_CCR2_PSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW727C/
DMCXW727C_cm33_core0.h21614 #define LPCMP_CCR2_PSEL_MASK (0x70000U) macro
21626 … (((uint32_t)(((uint32_t)(x)) << LPCMP_CCR2_PSEL_SHIFT)) & LPCMP_CCR2_PSEL_MASK)
DMCXW727C_cm33_core1.h29924 #define LPCMP_CCR2_PSEL_MASK (0x70000U) macro
29936 … (((uint32_t)(((uint32_t)(x)) << LPCMP_CCR2_PSEL_SHIFT)) & LPCMP_CCR2_PSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h46544 #define LPCMP_CCR2_PSEL_MASK (0x70000U) macro
46556 … (((uint32_t)(((uint32_t)(x)) << LPCMP_CCR2_PSEL_SHIFT)) & LPCMP_CCR2_PSEL_MASK)
DMCXN546_cm33_core1.h46544 #define LPCMP_CCR2_PSEL_MASK (0x70000U) macro
46556 … (((uint32_t)(((uint32_t)(x)) << LPCMP_CCR2_PSEL_SHIFT)) & LPCMP_CCR2_PSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h46544 #define LPCMP_CCR2_PSEL_MASK (0x70000U) macro
46556 … (((uint32_t)(((uint32_t)(x)) << LPCMP_CCR2_PSEL_SHIFT)) & LPCMP_CCR2_PSEL_MASK)
DMCXN547_cm33_core1.h46544 #define LPCMP_CCR2_PSEL_MASK (0x70000U) macro
46556 … (((uint32_t)(((uint32_t)(x)) << LPCMP_CCR2_PSEL_SHIFT)) & LPCMP_CCR2_PSEL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h46979 #define LPCMP_CCR2_PSEL_MASK (0x70000U) macro
46991 … (((uint32_t)(((uint32_t)(x)) << LPCMP_CCR2_PSEL_SHIFT)) & LPCMP_CCR2_PSEL_MASK)

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