Searched refs:LCDIFPIXELCLKSEL_OFFSET (Results 1 – 3 of 3) sorted by relevance
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/drivers/ |
| D | fsl_clock.h | 953 #define LCDIFPIXELCLKSEL_OFFSET 0x340 macro
1685 … CLKCTL4_TUPLE_MUXA(LCDIFPIXELCLKSEL_OFFSET, 0), /*!< Attach MEDIA VDD2 base clock to LCDIF. */
1687 CLKCTL4_TUPLE_MUXA(LCDIFPIXELCLKSEL_OFFSET, 1), /*!< Attach Main PLL PFD0 clock to LCDIF. */
1688 …kFRO0_DIV1_to_LCDIF = CLKCTL4_TUPLE_MUXA(LCDIFPIXELCLKSEL_OFFSET, 2), /*!< Attach FRO0 max cl…
1689 …kAUDIO_PLL_PFD1_to_LCDIF = CLKCTL4_TUPLE_MUXA(LCDIFPIXELCLKSEL_OFFSET, 3), /*!< Attach Audio PLL P…
1690 …kNONE_to_LCDIF = CLKCTL4_TUPLE_MUXA_NONE(LCDIFPIXELCLKSEL_OFFSET, 0), /*!< Attach NONE t…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/drivers/ |
| D | fsl_clock.h | 953 #define LCDIFPIXELCLKSEL_OFFSET 0x340 macro
1685 … CLKCTL4_TUPLE_MUXA(LCDIFPIXELCLKSEL_OFFSET, 0), /*!< Attach MEDIA VDD2 base clock to LCDIF. */
1687 CLKCTL4_TUPLE_MUXA(LCDIFPIXELCLKSEL_OFFSET, 1), /*!< Attach Main PLL PFD0 clock to LCDIF. */
1688 …kFRO0_DIV1_to_LCDIF = CLKCTL4_TUPLE_MUXA(LCDIFPIXELCLKSEL_OFFSET, 2), /*!< Attach FRO0 max cl…
1689 …kAUDIO_PLL_PFD1_to_LCDIF = CLKCTL4_TUPLE_MUXA(LCDIFPIXELCLKSEL_OFFSET, 3), /*!< Attach Audio PLL P…
1690 …kNONE_to_LCDIF = CLKCTL4_TUPLE_MUXA_NONE(LCDIFPIXELCLKSEL_OFFSET, 0), /*!< Attach NONE t…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/drivers/ |
| D | fsl_clock.h | 953 #define LCDIFPIXELCLKSEL_OFFSET 0x340 macro
1685 … CLKCTL4_TUPLE_MUXA(LCDIFPIXELCLKSEL_OFFSET, 0), /*!< Attach MEDIA VDD2 base clock to LCDIF. */
1687 CLKCTL4_TUPLE_MUXA(LCDIFPIXELCLKSEL_OFFSET, 1), /*!< Attach Main PLL PFD0 clock to LCDIF. */
1688 …kFRO0_DIV1_to_LCDIF = CLKCTL4_TUPLE_MUXA(LCDIFPIXELCLKSEL_OFFSET, 2), /*!< Attach FRO0 max cl…
1689 …kAUDIO_PLL_PFD1_to_LCDIF = CLKCTL4_TUPLE_MUXA(LCDIFPIXELCLKSEL_OFFSET, 3), /*!< Attach Audio PLL P…
1690 …kNONE_to_LCDIF = CLKCTL4_TUPLE_MUXA_NONE(LCDIFPIXELCLKSEL_OFFSET, 0), /*!< Attach NONE t…
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