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Searched refs:INPUTMUX_DMA1_REQ_ENABLE3_REQ120_EN1_SHIFT (Results 1 – 8 of 8) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h45213 #define INPUTMUX_DMA1_REQ_ENABLE3_REQ120_EN1_SHIFT (24U) macro
45218 …ENABLE3_REQ120_EN1(x) (((uint32_t)(((uint32_t)(x)) << INPUTMUX_DMA1_REQ_ENABLE3_REQ120_EN1_SHIFT)…
DMCXN546_cm33_core1.h45213 #define INPUTMUX_DMA1_REQ_ENABLE3_REQ120_EN1_SHIFT (24U) macro
45218 …ENABLE3_REQ120_EN1(x) (((uint32_t)(((uint32_t)(x)) << INPUTMUX_DMA1_REQ_ENABLE3_REQ120_EN1_SHIFT)…
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h45213 #define INPUTMUX_DMA1_REQ_ENABLE3_REQ120_EN1_SHIFT (24U) macro
45218 …ENABLE3_REQ120_EN1(x) (((uint32_t)(((uint32_t)(x)) << INPUTMUX_DMA1_REQ_ENABLE3_REQ120_EN1_SHIFT)…
DMCXN547_cm33_core1.h45213 #define INPUTMUX_DMA1_REQ_ENABLE3_REQ120_EN1_SHIFT (24U) macro
45218 …ENABLE3_REQ120_EN1(x) (((uint32_t)(((uint32_t)(x)) << INPUTMUX_DMA1_REQ_ENABLE3_REQ120_EN1_SHIFT)…
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h45640 #define INPUTMUX_DMA1_REQ_ENABLE3_REQ120_EN1_SHIFT (24U) macro
45645 …ENABLE3_REQ120_EN1(x) (((uint32_t)(((uint32_t)(x)) << INPUTMUX_DMA1_REQ_ENABLE3_REQ120_EN1_SHIFT)…
DMCXN947_cm33_core0.h45640 #define INPUTMUX_DMA1_REQ_ENABLE3_REQ120_EN1_SHIFT (24U) macro
45645 …ENABLE3_REQ120_EN1(x) (((uint32_t)(((uint32_t)(x)) << INPUTMUX_DMA1_REQ_ENABLE3_REQ120_EN1_SHIFT)…
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h45640 #define INPUTMUX_DMA1_REQ_ENABLE3_REQ120_EN1_SHIFT (24U) macro
45645 …ENABLE3_REQ120_EN1(x) (((uint32_t)(((uint32_t)(x)) << INPUTMUX_DMA1_REQ_ENABLE3_REQ120_EN1_SHIFT)…
DMCXN946_cm33_core1.h45640 #define INPUTMUX_DMA1_REQ_ENABLE3_REQ120_EN1_SHIFT (24U) macro
45645 …ENABLE3_REQ120_EN1(x) (((uint32_t)(((uint32_t)(x)) << INPUTMUX_DMA1_REQ_ENABLE3_REQ120_EN1_SHIFT)…