Searched refs:INPUTMUX_DMA0_REQ_ENABLE2_REQ91_EN0_MASK (Results 1 – 8 of 8) sorted by relevance
41863 #define INPUTMUX_DMA0_REQ_ENABLE2_REQ91_EN0_MASK (0x8000000U) macro41869 …2_t)(x)) << INPUTMUX_DMA0_REQ_ENABLE2_REQ91_EN0_SHIFT)) & INPUTMUX_DMA0_REQ_ENABLE2_REQ91_EN0_MASK)
42290 #define INPUTMUX_DMA0_REQ_ENABLE2_REQ91_EN0_MASK (0x8000000U) macro42296 …2_t)(x)) << INPUTMUX_DMA0_REQ_ENABLE2_REQ91_EN0_SHIFT)) & INPUTMUX_DMA0_REQ_ENABLE2_REQ91_EN0_MASK)
