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Searched refs:I3C01PCLKDIV_OFFSET (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/drivers/
Dfsl_clock.h855 #define I3C01PCLKDIV_OFFSET 0xB08 macro
1708 …kCLOCK_DivI3c01PClk = CLKCTL0_TUPLE_MUXA(I3C01PCLKDIV_OFFSET, 0), /*!< I3C01 P-Clk Divider. …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/drivers/
Dfsl_clock.h855 #define I3C01PCLKDIV_OFFSET 0xB08 macro
1708 …kCLOCK_DivI3c01PClk = CLKCTL0_TUPLE_MUXA(I3C01PCLKDIV_OFFSET, 0), /*!< I3C01 P-Clk Divider. …
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/drivers/
Dfsl_clock.h855 #define I3C01PCLKDIV_OFFSET 0xB08 macro
1708 …kCLOCK_DivI3c01PClk = CLKCTL0_TUPLE_MUXA(I3C01PCLKDIV_OFFSET, 0), /*!< I3C01 P-Clk Divider. …