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Searched refs:I2S_FIFOCFG_ENABLETX_MASK (Results 1 – 25 of 52) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/LPC51U68/
DLPC51U68.h3930 #define I2S_FIFOCFG_ENABLETX_MASK (0x1U) macro
3936 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_ENABLETX_SHIFT)) & I2S_FIFOCFG_ENABLETX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54114/
DLPC54114_cm0plus.h4145 #define I2S_FIFOCFG_ENABLETX_MASK (0x1U) macro
4151 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_ENABLETX_SHIFT)) & I2S_FIFOCFG_ENABLETX_MASK)
DLPC54114_cm4.h4156 #define I2S_FIFOCFG_ENABLETX_MASK (0x1U) macro
4162 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_ENABLETX_SHIFT)) & I2S_FIFOCFG_ENABLETX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54113/
DLPC54113.h4157 #define I2S_FIFOCFG_ENABLETX_MASK (0x1U) macro
4163 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_ENABLETX_SHIFT)) & I2S_FIFOCFG_ENABLETX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54607/
DLPC54607.h5620 #define I2S_FIFOCFG_ENABLETX_MASK (0x1U) macro
5626 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_ENABLETX_SHIFT)) & I2S_FIFOCFG_ENABLETX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S005/
DLPC54S005.h5685 #define I2S_FIFOCFG_ENABLETX_MASK (0x1U) macro
5691 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_ENABLETX_SHIFT)) & I2S_FIFOCFG_ENABLETX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54005/
DLPC54005.h5277 #define I2S_FIFOCFG_ENABLETX_MASK (0x1U) macro
5283 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_ENABLETX_SHIFT)) & I2S_FIFOCFG_ENABLETX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54605/
DLPC54605.h5623 #define I2S_FIFOCFG_ENABLETX_MASK (0x1U) macro
5629 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_ENABLETX_SHIFT)) & I2S_FIFOCFG_ENABLETX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54606/
DLPC54606.h9771 #define I2S_FIFOCFG_ENABLETX_MASK (0x1U) macro
9777 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_ENABLETX_SHIFT)) & I2S_FIFOCFG_ENABLETX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54016/
DLPC54016.h8953 #define I2S_FIFOCFG_ENABLETX_MASK (0x1U) macro
8959 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_ENABLETX_SHIFT)) & I2S_FIFOCFG_ENABLETX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54616/
DLPC54616.h9846 #define I2S_FIFOCFG_ENABLETX_MASK (0x1U) macro
9852 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_ENABLETX_SHIFT)) & I2S_FIFOCFG_ENABLETX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54018M/
DLPC54018M.h9523 #define I2S_FIFOCFG_ENABLETX_MASK (0x1U) macro
9529 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_ENABLETX_SHIFT)) & I2S_FIFOCFG_ENABLETX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54628/
DLPC54628.h9842 #define I2S_FIFOCFG_ENABLETX_MASK (0x1U) macro
9848 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_ENABLETX_SHIFT)) & I2S_FIFOCFG_ENABLETX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502/
DLPC5502.h13884 #define I2S_FIFOCFG_ENABLETX_MASK (0x1U) macro
13890 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_ENABLETX_SHIFT)) & I2S_FIFOCFG_ENABLETX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502CPXXXX/
DLPC5502CPXXXX.h13815 #define I2S_FIFOCFG_ENABLETX_MASK (0x1U) macro
13821 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_ENABLETX_SHIFT)) & I2S_FIFOCFG_ENABLETX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54618/
DLPC54618.h9844 #define I2S_FIFOCFG_ENABLETX_MASK (0x1U) macro
9850 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_ENABLETX_SHIFT)) & I2S_FIFOCFG_ENABLETX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S018/
DLPC54S018.h9931 #define I2S_FIFOCFG_ENABLETX_MASK (0x1U) macro
9937 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_ENABLETX_SHIFT)) & I2S_FIFOCFG_ENABLETX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54018/
DLPC54018.h9523 #define I2S_FIFOCFG_ENABLETX_MASK (0x1U) macro
9529 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_ENABLETX_SHIFT)) & I2S_FIFOCFG_ENABLETX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S016/
DLPC54S016.h9318 #define I2S_FIFOCFG_ENABLETX_MASK (0x1U) macro
9324 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_ENABLETX_SHIFT)) & I2S_FIFOCFG_ENABLETX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5504CPXXXX/
DLPC5504CPXXXX.h13815 #define I2S_FIFOCFG_ENABLETX_MASK (0x1U) macro
13821 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_ENABLETX_SHIFT)) & I2S_FIFOCFG_ENABLETX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5504/
DLPC5504.h13884 #define I2S_FIFOCFG_ENABLETX_MASK (0x1U) macro
13890 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_ENABLETX_SHIFT)) & I2S_FIFOCFG_ENABLETX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5506/
DLPC5506.h13884 #define I2S_FIFOCFG_ENABLETX_MASK (0x1U) macro
13890 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_ENABLETX_SHIFT)) & I2S_FIFOCFG_ENABLETX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5506CPXXXX/
DLPC5506CPXXXX.h13815 #define I2S_FIFOCFG_ENABLETX_MASK (0x1U) macro
13821 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_ENABLETX_SHIFT)) & I2S_FIFOCFG_ENABLETX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54608/
DLPC54608.h9767 #define I2S_FIFOCFG_ENABLETX_MASK (0x1U) macro
9773 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_ENABLETX_SHIFT)) & I2S_FIFOCFG_ENABLETX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S018M/
DLPC54S018M.h9931 #define I2S_FIFOCFG_ENABLETX_MASK (0x1U) macro
9937 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_ENABLETX_SHIFT)) & I2S_FIFOCFG_ENABLETX_MASK)

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