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Searched refs:I2S_FIFOCFG_DMATX_MASK (Results 1 – 25 of 53) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/flexcomm/i2s/
Dfsl_i2s_dma.c386 base->FIFOCFG |= I2S_FIFOCFG_DMATX_MASK; in I2S_TxEnableDMA()
390 base->FIFOCFG &= (~I2S_FIFOCFG_DMATX_MASK); in I2S_TxEnableDMA()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC51U68/
DLPC51U68.h3967 #define I2S_FIFOCFG_DMATX_MASK (0x1000U) macro
3973 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_DMATX_SHIFT)) & I2S_FIFOCFG_DMATX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54114/
DLPC54114_cm0plus.h4182 #define I2S_FIFOCFG_DMATX_MASK (0x1000U) macro
4188 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_DMATX_SHIFT)) & I2S_FIFOCFG_DMATX_MASK)
DLPC54114_cm4.h4193 #define I2S_FIFOCFG_DMATX_MASK (0x1000U) macro
4199 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_DMATX_SHIFT)) & I2S_FIFOCFG_DMATX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54113/
DLPC54113.h4194 #define I2S_FIFOCFG_DMATX_MASK (0x1000U) macro
4200 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_DMATX_SHIFT)) & I2S_FIFOCFG_DMATX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54607/
DLPC54607.h5662 #define I2S_FIFOCFG_DMATX_MASK (0x1000U) macro
5668 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_DMATX_SHIFT)) & I2S_FIFOCFG_DMATX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S005/
DLPC54S005.h5727 #define I2S_FIFOCFG_DMATX_MASK (0x1000U) macro
5733 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_DMATX_SHIFT)) & I2S_FIFOCFG_DMATX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54005/
DLPC54005.h5319 #define I2S_FIFOCFG_DMATX_MASK (0x1000U) macro
5325 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_DMATX_SHIFT)) & I2S_FIFOCFG_DMATX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54605/
DLPC54605.h5665 #define I2S_FIFOCFG_DMATX_MASK (0x1000U) macro
5671 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_DMATX_SHIFT)) & I2S_FIFOCFG_DMATX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54606/
DLPC54606.h9813 #define I2S_FIFOCFG_DMATX_MASK (0x1000U) macro
9819 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_DMATX_SHIFT)) & I2S_FIFOCFG_DMATX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54016/
DLPC54016.h8995 #define I2S_FIFOCFG_DMATX_MASK (0x1000U) macro
9001 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_DMATX_SHIFT)) & I2S_FIFOCFG_DMATX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54616/
DLPC54616.h9888 #define I2S_FIFOCFG_DMATX_MASK (0x1000U) macro
9894 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_DMATX_SHIFT)) & I2S_FIFOCFG_DMATX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54018M/
DLPC54018M.h9565 #define I2S_FIFOCFG_DMATX_MASK (0x1000U) macro
9571 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_DMATX_SHIFT)) & I2S_FIFOCFG_DMATX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54628/
DLPC54628.h9884 #define I2S_FIFOCFG_DMATX_MASK (0x1000U) macro
9890 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_DMATX_SHIFT)) & I2S_FIFOCFG_DMATX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502/
DLPC5502.h13926 #define I2S_FIFOCFG_DMATX_MASK (0x1000U) macro
13932 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_DMATX_SHIFT)) & I2S_FIFOCFG_DMATX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502CPXXXX/
DLPC5502CPXXXX.h13857 #define I2S_FIFOCFG_DMATX_MASK (0x1000U) macro
13863 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_DMATX_SHIFT)) & I2S_FIFOCFG_DMATX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54618/
DLPC54618.h9886 #define I2S_FIFOCFG_DMATX_MASK (0x1000U) macro
9892 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_DMATX_SHIFT)) & I2S_FIFOCFG_DMATX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S018/
DLPC54S018.h9973 #define I2S_FIFOCFG_DMATX_MASK (0x1000U) macro
9979 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_DMATX_SHIFT)) & I2S_FIFOCFG_DMATX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54018/
DLPC54018.h9565 #define I2S_FIFOCFG_DMATX_MASK (0x1000U) macro
9571 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_DMATX_SHIFT)) & I2S_FIFOCFG_DMATX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S016/
DLPC54S016.h9360 #define I2S_FIFOCFG_DMATX_MASK (0x1000U) macro
9366 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_DMATX_SHIFT)) & I2S_FIFOCFG_DMATX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5504CPXXXX/
DLPC5504CPXXXX.h13857 #define I2S_FIFOCFG_DMATX_MASK (0x1000U) macro
13863 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_DMATX_SHIFT)) & I2S_FIFOCFG_DMATX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5504/
DLPC5504.h13926 #define I2S_FIFOCFG_DMATX_MASK (0x1000U) macro
13932 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_DMATX_SHIFT)) & I2S_FIFOCFG_DMATX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5506/
DLPC5506.h13926 #define I2S_FIFOCFG_DMATX_MASK (0x1000U) macro
13932 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_DMATX_SHIFT)) & I2S_FIFOCFG_DMATX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5506CPXXXX/
DLPC5506CPXXXX.h13857 #define I2S_FIFOCFG_DMATX_MASK (0x1000U) macro
13863 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_DMATX_SHIFT)) & I2S_FIFOCFG_DMATX_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54608/
DLPC54608.h9809 #define I2S_FIFOCFG_DMATX_MASK (0x1000U) macro
9815 … (((uint32_t)(((uint32_t)(x)) << I2S_FIFOCFG_DMATX_SHIFT)) & I2S_FIFOCFG_DMATX_MASK)

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