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Searched refs:GPV5_BASE_ADDR (Results 1 – 6 of 6) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimx8mnddr3l/
Dboard.c120 *(uint32_t *)(GPV5_BASE_ADDR + FORCE_INCR_OFFSET) = in BOARD_InitMemory()
121 *(uint32_t *)(GPV5_BASE_ADDR + FORCE_INCR_OFFSET) | FORCE_INCR_BIT_MASK; in BOARD_InitMemory()
Dboard.h30 #define GPV5_BASE_ADDR (0x32500000) macro
/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimx8mn/
Dboard.c124 *(uint32_t *)(GPV5_BASE_ADDR + FORCE_INCR_OFFSET) = in BOARD_InitMemory()
125 *(uint32_t *)(GPV5_BASE_ADDR + FORCE_INCR_OFFSET) | FORCE_INCR_BIT_MASK; in BOARD_InitMemory()
Dboard.h30 #define GPV5_BASE_ADDR (0x32500000) macro
/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimx8mm/
Dboard.c154 *(uint32_t *)(GPV5_BASE_ADDR + FORCE_INCR_OFFSET) = in BOARD_InitMemory()
155 *(uint32_t *)(GPV5_BASE_ADDR + FORCE_INCR_OFFSET) | FORCE_INCR_BIT_MASK; in BOARD_InitMemory()
Dboard.h30 #define GPV5_BASE_ADDR (0x32500000) macro