| /hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/ |
| D | S32K142_FTM.h | 1294 #define FTM_HCR_HCVAL_MASK (0xFFFFU) macro 1297 … (((uint32_t)(((uint32_t)(x)) << FTM_HCR_HCVAL_SHIFT)) & FTM_HCR_HCVAL_MASK)
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| D | S32K148_FTM.h | 1310 #define FTM_HCR_HCVAL_MASK (0xFFFFU) macro 1313 … (((uint32_t)(((uint32_t)(x)) << FTM_HCR_HCVAL_SHIFT)) & FTM_HCR_HCVAL_MASK)
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| D | S32K118_FTM.h | 1286 #define FTM_HCR_HCVAL_MASK (0xFFFFU) macro 1289 … (((uint32_t)(((uint32_t)(x)) << FTM_HCR_HCVAL_SHIFT)) & FTM_HCR_HCVAL_MASK)
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| D | S32K116_FTM.h | 1286 #define FTM_HCR_HCVAL_MASK (0xFFFFU) macro 1289 … (((uint32_t)(((uint32_t)(x)) << FTM_HCR_HCVAL_SHIFT)) & FTM_HCR_HCVAL_MASK)
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| D | S32K146_FTM.h | 1302 #define FTM_HCR_HCVAL_MASK (0xFFFFU) macro 1305 … (((uint32_t)(((uint32_t)(x)) << FTM_HCR_HCVAL_SHIFT)) & FTM_HCR_HCVAL_MASK)
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| D | S32K142W_FTM.h | 1294 #define FTM_HCR_HCVAL_MASK (0xFFFFU) macro 1297 … (((uint32_t)(((uint32_t)(x)) << FTM_HCR_HCVAL_SHIFT)) & FTM_HCR_HCVAL_MASK)
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| D | S32K144W_FTM.h | 1294 #define FTM_HCR_HCVAL_MASK (0xFFFFU) macro 1297 … (((uint32_t)(((uint32_t)(x)) << FTM_HCR_HCVAL_SHIFT)) & FTM_HCR_HCVAL_MASK)
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| D | S32K144_FTM.h | 1290 #define FTM_HCR_HCVAL_MASK (0xFFFFU) macro 1293 … (((uint32_t)(((uint32_t)(x)) << FTM_HCR_HCVAL_SHIFT)) & FTM_HCR_HCVAL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC865/ |
| D | LPC865.h | 3575 #define FTM_HCR_HCVAL_MASK (0xFFFFU) macro 3578 … (((uint32_t)(((uint32_t)(x)) << FTM_HCR_HCVAL_SHIFT)) & FTM_HCR_HCVAL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC864/ |
| D | LPC864.h | 3573 #define FTM_HCR_HCVAL_MASK (0xFFFFU) macro 3576 … (((uint32_t)(((uint32_t)(x)) << FTM_HCR_HCVAL_SHIFT)) & FTM_HCR_HCVAL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/ |
| D | MKE14Z4.h | 3305 #define FTM_HCR_HCVAL_MASK (0xFFFFU) macro 3309 … (((uint32_t)(((uint32_t)(x)) << FTM_HCR_HCVAL_SHIFT)) & FTM_HCR_HCVAL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/ |
| D | MKE15Z4.h | 3306 #define FTM_HCR_HCVAL_MASK (0xFFFFU) macro 3310 … (((uint32_t)(((uint32_t)(x)) << FTM_HCR_HCVAL_SHIFT)) & FTM_HCR_HCVAL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/ |
| D | MKE16Z4.h | 3304 #define FTM_HCR_HCVAL_MASK (0xFFFFU) macro 3308 … (((uint32_t)(((uint32_t)(x)) << FTM_HCR_HCVAL_SHIFT)) & FTM_HCR_HCVAL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/ |
| D | MKE12Z7.h | 6119 #define FTM_HCR_HCVAL_MASK (0xFFFFU) macro 6123 … (((uint32_t)(((uint32_t)(x)) << FTM_HCR_HCVAL_SHIFT)) & FTM_HCR_HCVAL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/ |
| D | MKE12Z9.h | 6019 #define FTM_HCR_HCVAL_MASK (0xFFFFU) macro 6022 … (((uint32_t)(((uint32_t)(x)) << FTM_HCR_HCVAL_SHIFT)) & FTM_HCR_HCVAL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/ |
| D | MKE17Z7.h | 6123 #define FTM_HCR_HCVAL_MASK (0xFFFFU) macro 6127 … (((uint32_t)(((uint32_t)(x)) << FTM_HCR_HCVAL_SHIFT)) & FTM_HCR_HCVAL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z7/ |
| D | MKE13Z7.h | 6121 #define FTM_HCR_HCVAL_MASK (0xFFFFU) macro 6125 … (((uint32_t)(((uint32_t)(x)) << FTM_HCR_HCVAL_SHIFT)) & FTM_HCR_HCVAL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z7/ |
| D | MKE14Z7.h | 5861 #define FTM_HCR_HCVAL_MASK (0xFFFFU) macro 5865 … (((uint32_t)(((uint32_t)(x)) << FTM_HCR_HCVAL_SHIFT)) & FTM_HCR_HCVAL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z9/ |
| D | MKE17Z9.h | 6021 #define FTM_HCR_HCVAL_MASK (0xFFFFU) macro 6024 … (((uint32_t)(((uint32_t)(x)) << FTM_HCR_HCVAL_SHIFT)) & FTM_HCR_HCVAL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z7/ |
| D | MKE15Z7.h | 5863 #define FTM_HCR_HCVAL_MASK (0xFFFFU) macro 5867 … (((uint32_t)(((uint32_t)(x)) << FTM_HCR_HCVAL_SHIFT)) & FTM_HCR_HCVAL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z9/ |
| D | MKE13Z9.h | 6020 #define FTM_HCR_HCVAL_MASK (0xFFFFU) macro 6023 … (((uint32_t)(((uint32_t)(x)) << FTM_HCR_HCVAL_SHIFT)) & FTM_HCR_HCVAL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/ |
| D | MKE14F16.h | 7904 #define FTM_HCR_HCVAL_MASK (0xFFFFU) macro 7908 … (((uint32_t)(((uint32_t)(x)) << FTM_HCR_HCVAL_SHIFT)) & FTM_HCR_HCVAL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/ |
| D | MKE18F16.h | 8908 #define FTM_HCR_HCVAL_MASK (0xFFFFU) macro 8912 … (((uint32_t)(((uint32_t)(x)) << FTM_HCR_HCVAL_SHIFT)) & FTM_HCR_HCVAL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/ |
| D | MKE16F16.h | 8903 #define FTM_HCR_HCVAL_MASK (0xFFFFU) macro 8907 … (((uint32_t)(((uint32_t)(x)) << FTM_HCR_HCVAL_SHIFT)) & FTM_HCR_HCVAL_MASK)
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/ |
| D | MIMX8QM6_ca53.h | 27698 #define FTM_HCR_HCVAL_MASK (0xFFFFU) macro 27701 … (((uint32_t)(((uint32_t)(x)) << FTM_HCR_HCVAL_SHIFT)) & FTM_HCR_HCVAL_MASK)
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