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Searched refs:FREQME_CTRLSTAT_RESULT_READY_STAT_MASK (Results 1 – 25 of 31) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/lpc_freqme/
Dfsl_freqme.h39 …kFREQME_ReadyInterruptStatusFlag = FREQME_CTRLSTAT_RESULT_READY_STAT_MASK, /*!< Indicate the measu…
43 FREQME_CTRLSTAT_RESULT_READY_STAT_MASK, /*!< All interrupt
159 FREQME_CTRLSTAT_GT_MAX_STAT_MASK | FREQME_CTRLSTAT_RESULT_READY_STAT_MASK); in FREQME_StartMeasurementCycle()
176 FREQME_CTRLSTAT_GT_MAX_STAT_MASK | FREQME_CTRLSTAT_RESULT_READY_STAT_MASK); in FREQME_TerminateMeasurementCycle()
194 FREQME_CTRLSTAT_GT_MAX_STAT_MASK | FREQME_CTRLSTAT_RESULT_READY_STAT_MASK); in FREQME_EnableContinuousMode()
227 FREQME_CTRLSTAT_GT_MAX_STAT_MASK | FREQME_CTRLSTAT_RESULT_READY_STAT_MASK); in FREQME_SetOperateMode()
322 FREQME_CTRLSTAT_GT_MAX_STAT_MASK | FREQME_CTRLSTAT_RESULT_READY_STAT_MASK); in FREQME_SetPulsePolarity()
409 FREQME_CTRLSTAT_RESULT_READY_INT_EN_MASK | FREQME_CTRLSTAT_RESULT_READY_STAT_MASK); in FREQME_EnableInterrupts()
427 FREQME_CTRLSTAT_RESULT_READY_STAT_MASK | masks); in FREQME_DisableInterrupts()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/
DMCXA142.h9376 #define FREQME_CTRLSTAT_RESULT_READY_STAT_MASK (0x4000000U) macro
9382 …int32_t)(x)) << FREQME_CTRLSTAT_RESULT_READY_STAT_SHIFT)) & FREQME_CTRLSTAT_RESULT_READY_STAT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/
DMCXA143.h9376 #define FREQME_CTRLSTAT_RESULT_READY_STAT_MASK (0x4000000U) macro
9382 …int32_t)(x)) << FREQME_CTRLSTAT_RESULT_READY_STAT_SHIFT)) & FREQME_CTRLSTAT_RESULT_READY_STAT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/
DMCXA153.h9376 #define FREQME_CTRLSTAT_RESULT_READY_STAT_MASK (0x4000000U) macro
9382 …int32_t)(x)) << FREQME_CTRLSTAT_RESULT_READY_STAT_SHIFT)) & FREQME_CTRLSTAT_RESULT_READY_STAT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/
DMCXA152.h9376 #define FREQME_CTRLSTAT_RESULT_READY_STAT_MASK (0x4000000U) macro
9382 …int32_t)(x)) << FREQME_CTRLSTAT_RESULT_READY_STAT_SHIFT)) & FREQME_CTRLSTAT_RESULT_READY_STAT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h12431 #define FREQME_CTRLSTAT_RESULT_READY_STAT_MASK (0x4000000U) macro
12437 …int32_t)(x)) << FREQME_CTRLSTAT_RESULT_READY_STAT_SHIFT)) & FREQME_CTRLSTAT_RESULT_READY_STAT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h12431 #define FREQME_CTRLSTAT_RESULT_READY_STAT_MASK (0x4000000U) macro
12437 …int32_t)(x)) << FREQME_CTRLSTAT_RESULT_READY_STAT_SHIFT)) & FREQME_CTRLSTAT_RESULT_READY_STAT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h12431 #define FREQME_CTRLSTAT_RESULT_READY_STAT_MASK (0x4000000U) macro
12437 …int32_t)(x)) << FREQME_CTRLSTAT_RESULT_READY_STAT_SHIFT)) & FREQME_CTRLSTAT_RESULT_READY_STAT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/
DMCXA156.h12435 #define FREQME_CTRLSTAT_RESULT_READY_STAT_MASK (0x4000000U) macro
12441 …int32_t)(x)) << FREQME_CTRLSTAT_RESULT_READY_STAT_SHIFT)) & FREQME_CTRLSTAT_RESULT_READY_STAT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/
DMCXA154.h12435 #define FREQME_CTRLSTAT_RESULT_READY_STAT_MASK (0x4000000U) macro
12441 …int32_t)(x)) << FREQME_CTRLSTAT_RESULT_READY_STAT_SHIFT)) & FREQME_CTRLSTAT_RESULT_READY_STAT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/
DMCXA155.h12435 #define FREQME_CTRLSTAT_RESULT_READY_STAT_MASK (0x4000000U) macro
12441 …int32_t)(x)) << FREQME_CTRLSTAT_RESULT_READY_STAT_SHIFT)) & FREQME_CTRLSTAT_RESULT_READY_STAT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h15234 #define FREQME_CTRLSTAT_RESULT_READY_STAT_MASK (0x4000000U) macro
15240 …int32_t)(x)) << FREQME_CTRLSTAT_RESULT_READY_STAT_SHIFT)) & FREQME_CTRLSTAT_RESULT_READY_STAT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h15234 #define FREQME_CTRLSTAT_RESULT_READY_STAT_MASK (0x4000000U) macro
15240 …int32_t)(x)) << FREQME_CTRLSTAT_RESULT_READY_STAT_SHIFT)) & FREQME_CTRLSTAT_RESULT_READY_STAT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S36/
DLPC55S36.h15233 #define FREQME_CTRLSTAT_RESULT_READY_STAT_MASK (0x4000000U) macro
15239 …int32_t)(x)) << FREQME_CTRLSTAT_RESULT_READY_STAT_SHIFT)) & FREQME_CTRLSTAT_RESULT_READY_STAT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h19498 #define FREQME_CTRLSTAT_RESULT_READY_STAT_MASK (0x4000000U) macro
19504 …int32_t)(x)) << FREQME_CTRLSTAT_RESULT_READY_STAT_SHIFT)) & FREQME_CTRLSTAT_RESULT_READY_STAT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h19468 #define FREQME_CTRLSTAT_RESULT_READY_STAT_MASK (0x4000000U) macro
19474 …int32_t)(x)) << FREQME_CTRLSTAT_RESULT_READY_STAT_SHIFT)) & FREQME_CTRLSTAT_RESULT_READY_STAT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h28206 #define FREQME_CTRLSTAT_RESULT_READY_STAT_MASK (0x4000000U) macro
28212 …int32_t)(x)) << FREQME_CTRLSTAT_RESULT_READY_STAT_SHIFT)) & FREQME_CTRLSTAT_RESULT_READY_STAT_MASK)
DMCXN546_cm33_core1.h28206 #define FREQME_CTRLSTAT_RESULT_READY_STAT_MASK (0x4000000U) macro
28212 …int32_t)(x)) << FREQME_CTRLSTAT_RESULT_READY_STAT_SHIFT)) & FREQME_CTRLSTAT_RESULT_READY_STAT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h28206 #define FREQME_CTRLSTAT_RESULT_READY_STAT_MASK (0x4000000U) macro
28212 …int32_t)(x)) << FREQME_CTRLSTAT_RESULT_READY_STAT_SHIFT)) & FREQME_CTRLSTAT_RESULT_READY_STAT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi4.h31994 #define FREQME_CTRLSTAT_RESULT_READY_STAT_MASK (0x4000000U) macro
32000 …int32_t)(x)) << FREQME_CTRLSTAT_RESULT_READY_STAT_SHIFT)) & FREQME_CTRLSTAT_RESULT_READY_STAT_MASK)
DMIMXRT798S_cm33_core0.h32057 #define FREQME_CTRLSTAT_RESULT_READY_STAT_MASK (0x4000000U) macro
32063 …int32_t)(x)) << FREQME_CTRLSTAT_RESULT_READY_STAT_SHIFT)) & FREQME_CTRLSTAT_RESULT_READY_STAT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_ezhv.h32431 #define FREQME_CTRLSTAT_RESULT_READY_STAT_MASK (0x4000000U) macro
32437 …int32_t)(x)) << FREQME_CTRLSTAT_RESULT_READY_STAT_SHIFT)) & FREQME_CTRLSTAT_RESULT_READY_STAT_MASK)
DMIMXRT735S_cm33_core0.h32057 #define FREQME_CTRLSTAT_RESULT_READY_STAT_MASK (0x4000000U) macro
32063 …int32_t)(x)) << FREQME_CTRLSTAT_RESULT_READY_STAT_SHIFT)) & FREQME_CTRLSTAT_RESULT_READY_STAT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core0.h32057 #define FREQME_CTRLSTAT_RESULT_READY_STAT_MASK (0x4000000U) macro
32063 …int32_t)(x)) << FREQME_CTRLSTAT_RESULT_READY_STAT_SHIFT)) & FREQME_CTRLSTAT_RESULT_READY_STAT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h28252 #define FREQME_CTRLSTAT_RESULT_READY_STAT_MASK (0x4000000U) macro
28258 …int32_t)(x)) << FREQME_CTRLSTAT_RESULT_READY_STAT_SHIFT)) & FREQME_CTRLSTAT_RESULT_READY_STAT_MASK)

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